> -----Original Message-----
> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
> Sent: Tuesday, October 13, 2020 4:08 PM
> To: xiezhiheng <xiezhih...@huawei.com>
> Cc: Richard Biener <richard.guent...@gmail.com>; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions
> emitted at -O3
> 

Cut ...

> 
> Thanks, LGTM.  Pushed to trunk.
> 

I made two separate patches for these two groups, get/set register intrinsics 
and store intrinsics.

Note: It does not matter which patch is applied first.

Bootstrapped and tested on aarch64 Linux platform.

Thanks,
Xie Zhiheng


diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d1ce634eb2b..8828cc5929d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-10-19  Zhiheng Xie  <xiezhih...@huawei.com>
+           Nannan Zheng  <zhengnan...@huawei.com>
+
+       * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+       for get/set reg intrinsics.
+

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d1ce634eb2b..bab5c1faf3c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-10-19  Zhiheng Xie  <xiezhih...@huawei.com>
+           Nannan Zheng  <zhengnan...@huawei.com>
+
+       * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
+       for store intrinsics.
+

Attachment: get_set-reg-v1.patch
Description: get_set-reg-v1.patch

Attachment: store-v1.patch
Description: store-v1.patch

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