From e957f2a9d03fc46fe4978d5014897b0d95e9de6e Mon Sep 17 00:00:00 2001 From: zhengnannan Date: Sat, 7 Nov 2020 02:40:46 +0800 Subject: [PATCH] AArch64: Add FLAG for tbl/tbx intrinsics [PR94442] 2020-11-09 Zhiheng Xie Nannan Zheng gcc/ChangeLog: * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG for tbl/tbx intrinsics. --- gcc/config/aarch64/aarch64-simd-builtins.def | 24 ++++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 6d898d4503a..968ddf026bf 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -538,28 +538,28 @@ VAR1 (BINOPP, crypto_pmull, 0, NONE, v2di) /* Implemented by aarch64_tbl3. */ - VAR1 (BINOP, tbl3, 0, ALL, v8qi) - VAR1 (BINOP, tbl3, 0, ALL, v16qi) + VAR1 (BINOP, tbl3, 0, NONE, v8qi) + VAR1 (BINOP, tbl3, 0, NONE, v16qi) /* Implemented by aarch64_qtbl3. */ - VAR1 (BINOP, qtbl3, 0, ALL, v8qi) - VAR1 (BINOP, qtbl3, 0, ALL, v16qi) + VAR1 (BINOP, qtbl3, 0, NONE, v8qi) + VAR1 (BINOP, qtbl3, 0, NONE, v16qi) /* Implemented by aarch64_qtbl4. */ - VAR1 (BINOP, qtbl4, 0, ALL, v8qi) - VAR1 (BINOP, qtbl4, 0, ALL, v16qi) + VAR1 (BINOP, qtbl4, 0, NONE, v8qi) + VAR1 (BINOP, qtbl4, 0, NONE, v16qi) /* Implemented by aarch64_tbx4. */ - VAR1 (TERNOP, tbx4, 0, ALL, v8qi) - VAR1 (TERNOP, tbx4, 0, ALL, v16qi) + VAR1 (TERNOP, tbx4, 0, NONE, v8qi) + VAR1 (TERNOP, tbx4, 0, NONE, v16qi) /* Implemented by aarch64_qtbx3. */ - VAR1 (TERNOP, qtbx3, 0, ALL, v8qi) - VAR1 (TERNOP, qtbx3, 0, ALL, v16qi) + VAR1 (TERNOP, qtbx3, 0, NONE, v8qi) + VAR1 (TERNOP, qtbx3, 0, NONE, v16qi) /* Implemented by aarch64_qtbx4. */ - VAR1 (TERNOP, qtbx4, 0, ALL, v8qi) - VAR1 (TERNOP, qtbx4, 0, ALL, v16qi) + VAR1 (TERNOP, qtbx4, 0, NONE, v8qi) + VAR1 (TERNOP, qtbx4, 0, NONE, v16qi) /* Builtins for ARMv8.1-A Adv.SIMD instructions. */ -- 2.19.1