diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index 6359c40bdecda6c126bd70bef66561dd1da44dc9..c784b21acf2092cd475f8be1099740838e721f4c 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -8209,7 +8209,7 @@ (define_insn "@aarch64_pred_reduc_<optab>_<mode>"
 (define_expand "reduc_<optab>_scal_<mode>"
   [(set (match_operand:<VEL> 0 "register_operand")
 	(unspec:<VEL> [(match_dup 2)
-		       (match_operand:SVE_FULL_I 1 "register_operand")]
+		       (match_operand:SVE_I 1 "register_operand")]
 		      SVE_INT_REDUCTION))]
   "TARGET_SVE"
   {
@@ -8221,7 +8221,7 @@ (define_expand "reduc_<optab>_scal_<mode>"
 (define_insn "@aarch64_pred_reduc_<optab>_<mode>"
   [(set (match_operand:<VEL> 0 "register_operand" "=w")
 	(unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl")
-		       (match_operand:SVE_FULL_I 2 "register_operand" "w")]
+		       (match_operand:SVE_I 2 "register_operand" "w")]
 		      SVE_INT_REDUCTION))]
   "TARGET_SVE"
   "<sve_int_op>\t%<Vetype>0, %1, %2.<Vetype>"
diff --git a/gcc/testsuite/g++.target/aarch64/pr98177-1.C b/gcc/testsuite/g++.target/aarch64/pr98177-1.C
new file mode 100644
index 0000000000000000000000000000000000000000..a776b7352f966f6b1d870ed51a7c94647bc46d80
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/pr98177-1.C
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8.2-a+sve -msve-vector-bits=128" } */
+
+int a, b;
+short c;
+void d(long e) {
+  for (int f = 0; f < b; f += 1)
+    for (short g = 0; g < c; g += 5)
+      a = (short)e;
+}
diff --git a/gcc/testsuite/g++.target/aarch64/pr98177-2.C b/gcc/testsuite/g++.target/aarch64/pr98177-2.C
new file mode 100644
index 0000000000000000000000000000000000000000..f89777075e962f2d11a6808d1c2b1ceac226a903
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/pr98177-2.C
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8.2-a+sve -msve-vector-bits=128" } */
+
+int a, b, c;
+
+void foo(long e) {
+  for (int f = 0; f < b; f ++)
+    for (int g = 0; g < c; g ++)
+      a = (short)e;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr98177-1.c b/gcc/testsuite/gcc.target/aarch64/pr98177-1.c
new file mode 100644
index 0000000000000000000000000000000000000000..a776b7352f966f6b1d870ed51a7c94647bc46d80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr98177-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8.2-a+sve -msve-vector-bits=128" } */
+
+int a, b;
+short c;
+void d(long e) {
+  for (int f = 0; f < b; f += 1)
+    for (short g = 0; g < c; g += 5)
+      a = (short)e;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr98177-2.c b/gcc/testsuite/gcc.target/aarch64/pr98177-2.c
new file mode 100644
index 0000000000000000000000000000000000000000..f89777075e962f2d11a6808d1c2b1ceac226a903
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr98177-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8.2-a+sve -msve-vector-bits=128" } */
+
+int a, b, c;
+
+void foo(long e) {
+  for (int f = 0; f < b; f ++)
+    for (int g = 0; g < c; g ++)
+      a = (short)e;
+}