When compiling with -msve-vector-bits=128, aarch64_preferred_simd_mode
would pass the same vector width to aarch64_simd_container_mode for
both SVE and Advanced SIMD, and so Advanced SIMD would always “win”.
This patch instead makes it choose directly between SVE and Advanced
SIMD modes, so that aarch64-autovec-preference==2 and
aarch64-autovec-preference==4 work for this configuration.
(aarch64-autovec-preference shouldn't affect aarch64_simd_container_mode
because that would have an ABI impact for things like GNU vectors.)
Tested on aarch64-linux-gnu (with and without SVE), pushed to trunk.
As Kyrill suggested, I'll backport to GCC 10 too.
Richard
gcc/
* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Use
aarch64_full_sve_mode and aarch64_vq_mode directly, instead of
going via aarch64_simd_container_mode.
---
gcc/config/aarch64/aarch64.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 67b4c91dbe4..70ddd70556f 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -17421,10 +17421,11 @@ aarch64_preferred_simd_mode (scalar_mode mode)
{
/* Take into account explicit auto-vectorization ISA preferences through
aarch64_cmp_autovec_modes. */
- poly_int64 bits
- = (TARGET_SVE && aarch64_cmp_autovec_modes (VNx16QImode, V16QImode))
- ? BITS_PER_SVE_VECTOR : 128;
- return aarch64_simd_container_mode (mode, bits);
+ if (TARGET_SVE && aarch64_cmp_autovec_modes (VNx16QImode, V16QImode))
+ return aarch64_full_sve_mode (mode).else_mode (word_mode);
+ if (TARGET_SIMD)
+ return aarch64_vq_mode (mode).else_mode (word_mode);
+ return word_mode;
}
/* Return a list of possible vector sizes for the vectorizer
