l2 cache size for Power8 is 512kB, correct the copy paste error from Power7.
Tested no performance change for SPEC2017.

gcc/ChangeLog:

2021-03-24  Xionghu Luo  <luo...@linux.ibm.com>

        * config/rs6000/rs6000.c (struct processor_costs): Change to
        512.
---
 gcc/config/rs6000/rs6000.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 616dae35bae..34c4edae20e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1055,7 +1055,7 @@ struct processor_costs power8_cost = {
   COSTS_N_INSNS (17),  /* ddiv */
   128,                 /* cache line size */
   32,                  /* l1 cache */
-  256,                 /* l2 cache */
+  512,                 /* l2 cache */
   12,                  /* prefetch streams */
   COSTS_N_INSNS (3),   /* SF->DF convert */
 };
-- 
2.25.1

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