On Mon, Mar 29, 2021 at 10:41:17AM +0000, Kyrylo Tkachov wrote:
> Hi all,
>
> This patch fixes the RTL representation of the move_lo_quad patterns to use
> aarch64_simd_or_scalar_imm_zero
> for the zero part rather than a vec_duplicate of zero or a const_int 0.
> The expander that generates them is also adjusted so that we use and match
> the correct const_vector forms throughout.
>
> Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
> Jakub, does this look like what you've had in mind?
I'd probably also remove VQ_2E iterator that is now unused (the VQMOV_NO2E
one is used in other patterns). But otherwise yes.
> gcc/ChangeLog:
>
> PR target/99037
> * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use
> aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern
> matching const_int 0.
> (move_lo_quad_internal_be_<mode>): Likewise.
> (move_lo_quad_<mode>): Update for the above.
>
> gcc/testsuite/ChangeLog:
>
> PR target/99808
> * gcc.target/aarch64/pr99808.c: New test.
Jakub
