diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 668c4f92adfa11c3d828ba696f225fedf5100b65..ebb32a2a172ed93fb63f887fb7ddcb9f2d276dad 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3025,7 +3025,7 @@ (define_insn "*subsi3_compare0_uxtw"
 (define_insn "sub<mode>3_compare1_imm"
   [(set (reg:CC CC_REGNUM)
 	(compare:CC
-	  (match_operand:GPI 1 "aarch64_reg_or_zero" "rkZ,rkZ")
+	  (match_operand:GPI 1 "register_operand" "rk,rk")
 	  (match_operand:GPI 2 "aarch64_plus_immediate" "I,J")))
    (set (match_operand:GPI 0 "register_operand" "=r,r")
 	(plus:GPI
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr99822.c b/gcc/testsuite/gcc.c-torture/compile/pr99822.c
new file mode 100644
index 0000000000000000000000000000000000000000..0660784bf896c47af306dc85e6d4bfbd76dab2b2
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr99822.c
@@ -0,0 +1,41 @@
+/* PR target/99822 */
+/* { dg-do assemble } */
+/* { dg-require-effective-target int128 } */
+
+int zt, bm, p5 = 1;
+
+void __attribute__ ((cold))
+l2 (unsigned long int hz)
+{
+  __int128 d9 = 0;
+  unsigned long int *mg = hz ? &hz : (unsigned long int *) &d9;
+
+  while (d9 < 1)
+    {
+      bm = bm > d9;
+      bm = bm == (d9 = bm || hz);
+
+      hz = 0x197000000;
+      d9 = hz * hz;
+
+      while (p5 < 1)
+        {
+          bm = ((hz = 3) ? zt : 0) > 0x1001;
+          if (bm != 0)
+            {
+              __int128 *nd = (__int128 *) bm;
+
+              *nd /= 3;
+            }
+
+          *mg = 0x1001;
+          p5 -= *mg;
+        }
+
+      for (zt = 0; zt >= 0; zt += 2)
+        d9 = 0;
+
+      d9 += 2;
+    }
+}
+