After providing expanders for reduc_umin/umax/smin/smax_scal_v4qi,
perfomance are a little bit faster than before for reduce operations
w/ options -O2 -march=haswell, -O2 -march=skylake-avx512
and -Ofast -march=skylake-avx512.
gcc/ChangeLog
PR target/102483
* config/i386/i386-expand.c (emit_reduc_half): Handle
V4QImode.
* config/i386/mmx.md (reduc_<code>_scal_v4qi): New expander.
(reduc_plus_scal_v4qi): Ditto.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr102483.c: New test.
* gcc.target/i386/pr102483-2.c: New test.
---
gcc/config/i386/i386-expand.c | 5 ++
gcc/config/i386/mmx.md | 45 +++++++++++++++++
gcc/testsuite/gcc.target/i386/pr102483-2.c | 26 ++++++++++
gcc/testsuite/gcc.target/i386/pr102483.c | 58 ++++++++++++++++++++++
4 files changed, 134 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/pr102483-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr102483.c
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 3e6f7d8ef7e..4badeeeee9e 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -16043,6 +16043,11 @@ emit_reduc_half (rtx dest, rtx src, int i)
case E_V2DFmode:
tem = gen_vec_interleave_highv2df (dest, src, src);
break;
+ case E_V4QImode:
+ d = gen_reg_rtx (V1SImode);
+ tem = gen_mmx_lshrv1si3 (d, gen_lowpart (V1SImode, src),
+ GEN_INT (i / 2));
+ break;
case E_V4HImode:
d = gen_reg_rtx (V1DImode);
tem = gen_mmx_lshrv1di3 (d, gen_lowpart (V1DImode, src),
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 106d41c8fd9..6c5cbcfa52c 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -3989,6 +3989,18 @@ (define_expand "reduc_<code>_scal_v4hi"
DONE;
})
+(define_expand "reduc_<code>_scal_v4qi"
+ [(smaxmin:V4QI
+ (match_operand:QI 0 "register_operand")
+ (match_operand:V4QI 1 "register_operand"))]
+ "TARGET_SSE4_1"
+{
+ rtx tmp = gen_reg_rtx (V4QImode);
+ ix86_expand_reduc (gen_<code>v4qi3, tmp, operands[1]);
+ emit_insn (gen_vec_extractv4qiqi (operands[0], tmp, const0_rtx));
+ DONE;
+})
+
(define_expand "reduc_<code>_scal_v4hi"
[(umaxmin:V4HI
(match_operand:HI 0 "register_operand")
@@ -4001,6 +4013,39 @@ (define_expand "reduc_<code>_scal_v4hi"
DONE;
})
+(define_expand "reduc_<code>_scal_v4qi"
+ [(umaxmin:V4QI
+ (match_operand:QI 0 "register_operand")
+ (match_operand:V4QI 1 "register_operand"))]
+ "TARGET_SSE4_1"
+{
+ rtx tmp = gen_reg_rtx (V4QImode);
+ ix86_expand_reduc (gen_<code>v4qi3, tmp, operands[1]);
+ emit_insn (gen_vec_extractv4qiqi (operands[0], tmp, const0_rtx));
+ DONE;
+})
+
+(define_expand "reduc_plus_scal_v4qi"
+ [(plus:V4QI
+ (match_operand:QI 0 "register_operand")
+ (match_operand:V4QI 1 "register_operand"))]
+ "TARGET_SSE2"
+{
+ rtx op1 = gen_reg_rtx (V16QImode);
+ emit_insn (gen_vec_setv4si_0 (lowpart_subreg (V4SImode, op1, V16QImode),
+ CONST0_RTX (V4SImode),
+ lowpart_subreg (SImode,
+ operands[1],
+ V4QImode)));
+ rtx tmp = gen_reg_rtx (V16QImode);
+ emit_move_insn (tmp, CONST0_RTX (V16QImode));
+ rtx tmp2 = gen_reg_rtx (V2DImode);
+ emit_insn (gen_sse2_psadbw (tmp2, op1, tmp));
+ tmp2 = gen_lowpart (V16QImode, tmp2);
+ emit_insn (gen_vec_extractv16qiqi (operands[0], tmp2, const0_rtx));
+ DONE;
+})
+
(define_expand "usadv8qi"
[(match_operand:V2SI 0 "register_operand")
(match_operand:V8QI 1 "register_operand")
diff --git a/gcc/testsuite/gcc.target/i386/pr102483-2.c
b/gcc/testsuite/gcc.target/i386/pr102483-2.c
new file mode 100644
index 00000000000..d477c53db08
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr102483-2.c
@@ -0,0 +1,26 @@
+/* { dg-do run } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-O2 -msse4.1" } */
+
+#include "sse4_1-check.h"
+
+#include "pr102483.c"
+
+static void
+sse4_1_test ()
+{
+ char p[4] = { -103, 23, 41, -56 };
+ unsigned char up[4] = { 100, 30, 255, 9 };
+
+ char res = reduce_add (p);
+ if (res != -95)
+ abort ();
+ if (reduce_smin (p) != -103)
+ abort ();
+ if (reduce_smax (p) != 41)
+ abort ();
+ if (reduce_umin (up) != 9)
+ abort ();
+ if (reduce_umax (up) != 255)
+ abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr102483.c
b/gcc/testsuite/gcc.target/i386/pr102483.c
new file mode 100644
index 00000000000..681b57598ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr102483.c
@@ -0,0 +1,58 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse4.1 -ftree-vectorize -fdump-tree-optimized" } */
+/* { dg-final { scan-tree-dump-times "\.REDUC_MIN" 2 "optimized" } } */
+/* { dg-final { scan-tree-dump-times "\.REDUC_MAX" 2 "optimized" } } */
+/* { dg-final { scan-tree-dump-times "\.REDUC_PLUS" 1 "optimized" } } */
+
+char
+__attribute__((noipa, optimize("Ofast"),target("sse4.1")))
+reduce_add (char* p)
+{
+ char sum = 0;
+ for (int i = 0; i != 4; i++)
+ sum += p[i];
+ return sum;
+}
+
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) > (b) ? (b) : (a))
+
+unsigned char
+__attribute__((noipa, optimize("Ofast"),target("sse4.1")))
+reduce_umax (unsigned char* p)
+{
+ unsigned char sum = p[0];
+ for (int i = 0; i != 4; i++)
+ sum = MAX(sum, p[i]);
+ return sum;
+}
+
+unsigned char
+__attribute__((noipa, optimize("Ofast"),target("sse4.1")))
+reduce_umin (unsigned char* p)
+{
+ unsigned char sum = p[0];
+ for (int i = 0; i != 4; i++)
+ sum = MIN(sum, p[i]);
+ return sum;
+}
+
+char
+__attribute__((noipa, optimize("Ofast"),target("sse4.1")))
+reduce_smax (char* p)
+{
+ char sum = p[0];
+ for (int i = 0; i != 4; i++)
+ sum = MAX(sum, p[i]);
+ return sum;
+}
+
+char
+__attribute__((noipa, optimize("Ofast"),target("sse4.1")))
+reduce_smin (char* p)
+{
+ char sum = p[0];
+ for (int i = 0; i != 4; i++)
+ sum = MIN(sum, p[i]);
+ return sum;
+}
--
2.18.1
