On Fri, 2012-03-02 at 10:11 -0800, Richard Henderson wrote:

> For proper binary compatibility, we should probably introduce that asap.
> You forgot two things in your patch, gen_int_mode and the fact that we
> still have to return a boolean (0/1) value.

Ah, yes, of course!

> Also in order for the binary compatibility to work right, you'd want to
> have the SH test-and-set-trueval set appropriately asap.  Kaz, I assume
> you'd agree that 0x80 is a good value for the "tas.b" insn?  We don't
> necessarily need to support tas.b right away, but getting trueval set
> right is imperative.
> I'm in the process of sanity testing this on x86_64 with trueval set to 0x80.
> Jakub, ok for 4.7 branch if it passes?

Since we're now back to stage 1 again, I'm about to commit this one ...

So the SH tas.b instruction support should be there from 4.8.
Attached is the hunk from the tas.b patch for 4.8 to define

Index: gcc/config/sh/sh.h
--- gcc/config/sh/sh.h	(revision 184669)
+++ gcc/config/sh/sh.h	(working copy)
@@ -2475,4 +2475,11 @@
 /* FIXME: middle-end support for highpart optimizations is missing.  */
 #define high_life_started reload_in_progress
+/* The tas.b instruction sets the 7th bit in the byte, i.e. 0x80.
+   This value is used by optabs.c atomic op expansion code as well as in 
+   sync.md.  It must be defined as signed char here or else the movqi
+   pattern will refuse to load it as a QImode constant.  */
+#define TARGET_ATOMIC_TEST_AND_SET_TRUEVAL ((signed char)0x80)
 #endif /* ! GCC_SH_H */

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