On Mon, Mar 05, 2012 at 09:26:20AM -0800, H.J. Lu wrote:
> On Mon, Mar 5, 2012 at 9:20 AM, Jakub Jelinek <ja...@redhat.com> wrote:
> > On Mon, Mar 05, 2012 at 09:13:49AM -0800, H.J. Lu wrote:
> >> >> We are expecting address to be 0x1001 - 1 == 0x1000. But, what we get
> >> >> is 0x1000 + 0xffffffff, not 0x1000 since 0x67 address prefix only
> >> >> applies to
> >> >> base register to zero-extend 0xffffffff to 64bit.
> >> >
> >> > I would call this a bug in the specification - I guess that
> >> > 0x1001(%eax) works correctly.
> >> This is how hardware works.
> > Do you really need to use addr32 prefixes for the direct TLS seg refs?
> > Without that the addresses will be sign-extended from the 32-bit immediate
> > (which is used in LP64 x86_64 code too) and everything will work fine, won't
> > it?
> 32bit immediate is OK. The problem is fs:(32bit register).
Just require that the MEM uses DImode address in those patterns, even for -mx32?