On Mon, Dec 20, 2021 at 11:45:45AM -0500, David Edelsohn wrote: > On Mon, Dec 20, 2021 at 3:24 AM Xionghu Luo <luo...@linux.ibm.com> wrote: > > These four UNSPECS seems could be replaced with native RTL, and why > > "(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))" > > in the RTL pattern, per ISA of VSCR bit 127(VECTOR Saturation, SAT): > > > > This bit is sticky; that is, once set to 1 it > > remains set to 1 until it is set to 0 by an > > mtvscr instruction. > > > > The RTL pattern set it to 0 but final ASM doesn't present it? And why > > not use Clobber VSCR_REGNO instead? > > The design came from the early implementation of Altivec: > > https://gcc.gnu.org/pipermail/gcc-patches/2002-May/077409.html > > If one later checks for saturation (reads VSCR), one needs a > corresponding SET of the value. It's set in an architecture-specific > manner that isn't described to GCC, but it's set, not just clobbered > and in an undefined state.
Well. RTL clobber and set do exactly the same thing, except with clobber it is not specified *what* value is set. All bits are set, all bits are defined. There is no (direct) way in RTL to say "undetermined". An RTL clobber would work just fine afaics? > The RTL does not describe that VSCR is set to the value 0. The > (const_int 0) is not the value set. You can think of the (const_int > 0) as a dummy RTL argument to the VSCR UNSPEC. UNSPEC requires at > least one argument and the pattern doesn't try to express the > argument, so it uses a dummy RTL constant. Yup. Traditionally (pc) was used for this. Nowadays (const_int 0) is not really more expensive anymore, and many people find it clearer (but not in this case it seems :-) ). > It's part of a PARALLEL > and the plus or minus already expresses the data dependency of the > pattern on the input operands. But they do not describe any dependency on vscr, or output to it. This is the same problem we have with fpscr (most FP insns use some of its fields, most set some, but there is no way to cleanly express that). Explicit clobbers like this help one side of the issue. For vscr, other than the sat bit there is only the nj bit, and we just ignore that :-) > This patch is okay. Thanks for updating the machine description and > for cleaning up the formatting. x2. Thanks! Segher
