This patch fixes an issue reported by one of our customers where an instruction
exception gets raised when using '__sync_fetch_and_add' on a PowerPC 440
processor. The instruction causing the exception is 'lwsync'. Luckily Joseph
laid the groundwork when solving a similar issue for e500 cores  by adding a
new macro ('TARGET_NO_LWSYNC') for controlling whether 'lwsync' is available .
This patch extends the 'TARGET_NO_LWSYNC' macro to include the PowerPC 440
and 603 processors. The 440 because that is what the problem was reported
against and the 603 because problems have been reported elsewhere  about
that. It doesn't seem like 'lwsync' is supported on 603 processors anyway. I
looked at the IBM  and Freescale  manuals and both use the heavyweight
implementation of 'sync' (i.e. the 'sync' bit L=0).
FWIW, I also took a look at the Linux kernel code and 'lwsync' is only used
on 64-bit PowerPC processors and e500 processors that can support it. This
can be seen in 'arch/powerpc/include/asm/synch.h':
# define LWSYNC lwsync
# define LWSYNC \
# define LWSYNC sync
Support for the e500 processors is determined at runtime and the kernel is
Regression tested with powerpc-none-eabi.
P.S. If it is OK can some please commit for me? I don't have write access.
CodeSourcery / Mentor Embedded
2012-03-27 Meador Inge <mead...@codesourcery.com>
* config/rs6000/rs6000.h (TARGET_NO_LWSYNC): Extended to cover PPC
440 and 603 processors.
--- gcc/config/rs6000/rs6000.h (revision 185881)
+++ gcc/config/rs6000/rs6000.h (working copy)
@@ -501,8 +501,10 @@ extern int rs6000_vector_align;
-/* E500 processors only support plain "sync", not lwsync. */
-#define TARGET_NO_LWSYNC TARGET_E500
+/* Some processors only support plain "sync", not lwsync. */
+#define TARGET_NO_LWSYNC (TARGET_E500 \
+ || rs6000_cpu == PROCESSOR_PPC440 \
+ || rs6000_cpu == PROCESSOR_PPC603)
/* Which machine supports the various reciprocal estimate instructions. */
#define TARGET_FRES (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT \