On Wed, Oct 26, 2022 at 11:58:57AM -0700, H.J. Lu via Gcc-patches wrote:
> In i386.md, neg patterns which set MODE_CC register like
>
> (set (reg:CCC FLAGS_REG)
> (ne:CCC (match_operand:SWI48 1 "general_reg_operand") (const_int 0)))
>
> can lead to errors when operand 1 is a constant value. If FLAGS_REG in
But it cannot be. general_reg_operand will not allow that:
===
(define_predicate "general_reg_operand"
(and (match_code "reg")
(match_test "GENERAL_REGNO_P (REGNO (op))")))
===
> (set (reg:CCC FLAGS_REG)
> (ne:CCC (const_int 2) (const_int 0)))
>
> is set to 1, RTX simplifiers may simplify
"is set to 1"? Do you mean you do something like
(set (regs FLAGS_REG) (const_int 1))
? That is invalid RTL, as I've said tens of time in the last few weeks.
> which leads to incorrect results since LTU on MODE_CC register isn't the
> same as "unsigned less than" in x86 backend.
The special notation
(ltu (reg:CC) (const_int 0))
is not about comparing anything to 0, but simply means "did the
comparison-like thing that set that reg say ltu was true".
> To prevent RTL optimizers
> from setting MODE_CC register to a constant, use UNSPEC_CC_NE to replace
> ne:CCC/ne:CCO when setting FLAGS_REG in neg patterns.
This is an indirect workaround, nothing more. The unspec will naturally
not be folded to anything else (unless you arrange for that yourself),
there is nothing the generic code knows about the semantics of any
unspec after all.
AFIACS there is no way to express overflow in a CC, but an unspec can
help, sure. You need to fix the setter side as well though.
Segher
