gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
---
.../arm/mve/intrinsics/vhsubq_m_n_s16.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_n_s32.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_n_s8.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_n_u16.c | 42 +++++++++++++++++--
.../arm/mve/intrinsics/vhsubq_m_n_u32.c | 42 +++++++++++++++++--
.../arm/mve/intrinsics/vhsubq_m_n_u8.c | 42 +++++++++++++++++--
.../arm/mve/intrinsics/vhsubq_m_s16.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_s32.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_s8.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_u16.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_u32.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_m_u8.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_n_s16.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_n_s32.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_n_s8.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_n_u16.c | 28 ++++++++++++-
.../arm/mve/intrinsics/vhsubq_n_u32.c | 28 ++++++++++++-
.../arm/mve/intrinsics/vhsubq_n_u8.c | 28 ++++++++++++-
.../arm/mve/intrinsics/vhsubq_s16.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_s32.c | 16 ++++++-
.../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_u16.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_u32.c | 16 ++++++-
.../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 16 ++++++-
.../arm/mve/intrinsics/vhsubq_x_n_s16.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_x_n_s32.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_x_n_s8.c | 26 ++++++++++--
.../arm/mve/intrinsics/vhsubq_x_n_u16.c | 42 +++++++++++++++++--
.../arm/mve/intrinsics/vhsubq_x_n_u32.c | 42 +++++++++++++++++--
.../arm/mve/intrinsics/vhsubq_x_n_u8.c | 42 +++++++++++++++++--
.../arm/mve/intrinsics/vhsubq_x_s16.c | 25 +++++++++--
.../arm/mve/intrinsics/vhsubq_x_s32.c | 25 +++++++++--
.../arm/mve/intrinsics/vhsubq_x_s8.c | 25 +++++++++--
.../arm/mve/intrinsics/vhsubq_x_u16.c | 25 +++++++++--
.../arm/mve/intrinsics/vhsubq_x_u32.c | 25 +++++++++--
.../arm/mve/intrinsics/vhsubq_x_u8.c | 25 +++++++++--
36 files changed, 828 insertions(+), 114 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
index 27dcb7be957..6390589808f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
{
return vhsubq_m_n_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
index 75ae735f30d..db09d0f2c21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vhsubq_m_n_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
index 84cdeb42952..89ea3f2aaf8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
{
return vhsubq_m_n_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
index bc6610c3812..e6fb8be673b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vhsubq_m_n_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
+{
+ return vhsubq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
index e94bfc95027..7ab815d5623 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vhsubq_m_n_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
+{
+ return vhsubq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
index c2a5674afd1..0bf695aded4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vhsubq_m_n_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
+{
+ return vhsubq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
index 9f62a385554..3bad177ad28 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vhsubq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
index 486ae6b7d58..cc5cdb07059 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vhsubq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
index 9faaa4fbb0d..4c651091e59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vhsubq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
index aa5838cdad2..daed202c055 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vhsubq_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
index 00282ad6444..cf71e6dab13 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vhsubq_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
index 187d5bcf8a1..a8183dd48ed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vhsubq_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vhsubq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
index ce766486aed..af4f534d7ff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16_t b)
{
return vhsubq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s16" } } */
+/*
+**foo1:
+** ...
+** vhsub.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
index 1d820ffaf5a..941d38074a4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32_t b)
{
return vhsubq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s32" } } */
+/*
+**foo1:
+** ...
+** vhsub.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
index 90110b78f0d..9ceb4ef3c6f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8_t b)
{
return vhsubq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s8" } } */
+/*
+**foo1:
+** ...
+** vhsub.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
index e744ef58663..037ed2c637d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16_t b)
{
return vhsubq_n_u16 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u16" } } */
+/*
+**foo1:
+** ...
+** vhsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u16" } } */
+/*
+**foo2:
+** ...
+** vhsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a)
+{
+ return vhsubq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
index b1ce3f07904..f51eb10ecbf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32_t b)
{
return vhsubq_n_u32 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u32" } } */
+/*
+**foo1:
+** ...
+** vhsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u32" } } */
+/*
+**foo2:
+** ...
+** vhsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a)
+{
+ return vhsubq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
index 68872a8f900..24dd45db152 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
@@ -1,21 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8_t b)
{
return vhsubq_n_u8 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u8" } } */
+/*
+**foo1:
+** ...
+** vhsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u8" } } */
+/*
+**foo2:
+** ...
+** vhsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a)
+{
+ return vhsubq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
index 03bd6d595cb..0f275d48753 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vhsubq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s16" } } */
+/*
+**foo1:
+** ...
+** vhsub.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
index 515acb84e66..21aeb9d2a59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vhsubq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s32" } } */
+/*
+**foo1:
+** ...
+** vhsub.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
index 41fb2589924..b3ee94341b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vhsubq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s8" } } */
+/*
+**foo1:
+** ...
+** vhsub.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
index dda18779dca..690ef2de5ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vhsubq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u16" } } */
+/*
+**foo1:
+** ...
+** vhsub.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
index 86a5576bedf..cfe12573fa0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vhsubq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u32" } } */
+/*
+**foo1:
+** ...
+** vhsub.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
index d339ca0e5e4..1926bc34219 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vhsub.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vhsubq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u8" } } */
+/*
+**foo1:
+** ...
+** vhsub.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vhsubq (a, b);
}
-/* { dg-final { scan-assembler "vhsub.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
index 09da5c2f040..fcda4c541a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vhsubq_x_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
index f3c032987bc..55637221f21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vhsubq_x_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
index 1d86f7d72b3..ecfe188f3fa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
@@ -1,23 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vhsubq_x_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
index df6b7ea427a..bf3d6c38b85 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vhsubq_x_n_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+ return vhsubq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
index bea6f2d1f96..4ae75b09950 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vhsubq_x_n_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+ return vhsubq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
index e1fafd7a9f5..edfa4216a31 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
@@ -1,23 +1,57 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vhsubq_x_n_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+ return vhsubq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
index c9d3ffb45b7..bd2771b0978 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
@@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vhsubq_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
index 36343cffc85..0ea40df3d9e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
@@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vhsubq_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
index d1b134fe480..90ee94defb0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
@@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vhsubq_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
index 4da0fb3f340..d700741169a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
@@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vhsubq_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
index dfb0a6d371f..f43c9626829 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
@@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vhsubq_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
index d549892ef8b..a0908ba786b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
@@ -1,22 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vhsubq_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vhsubt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vhsubq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
