The ceil etc functions can be only inlined as instruction when
they can raise the "inexact" exception. Without the adding
conditions, it will cause the "gcc.dg/torture/builtin-fp-int-inexact-c2x.c"
etc cases fails.

gcc/
        * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): 
Test
        flag_fp_int_builtin_inexact || !flag_trapping_math.
        (<frm_pattern><mode>2): Likewise.
---
 gcc/config/csky/csky_insn_fpuv3.md | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/config/csky/csky_insn_fpuv3.md 
b/gcc/config/csky/csky_insn_fpuv3.md
index 628bae597ba..7f8f459621e 100644
--- a/gcc/config/csky/csky_insn_fpuv3.md
+++ b/gcc/config/csky/csky_insn_fpuv3.md
@@ -476,14 +476,16 @@
   [(set (match_operand:SI 0 "register_operand" "=v")
        (FIX_SU:SI (unspec:F3ANY [(match_operand:F3ANY 1 "register_operand" 
"0")]
                                   FRM)))]
-  "CSKY_ISA_FEATURE(fpv3_<mode>)"
+  "CSKY_ISA_FEATURE(fpv3_<mode>)
+   && (flag_fp_int_builtin_inexact || !flag_trapping_math)"
   "fftoi.f<f3t>.<fixsu>32<rm>\t%0, %1"
 )
 
 (define_insn "<frm_pattern><mode>2"
   [(set (match_operand:F3ANY 0 "register_operand" "=v")
        (unspec:F3ANY [(match_operand:F3ANY 1 "register_operand" "0")] FRMF))]
-  "CSKY_ISA_FEATURE(fpv3_<mode>)"
+  "CSKY_ISA_FEATURE(fpv3_<mode>)
+   && (flag_fp_int_builtin_inexact || !flag_trapping_math)"
   "fftofi.f<f3t><rm>\t%0, %1"
 )
 
-- 
2.32.1 (Apple Git-133)

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