Avoid VL_REGS, VTYPE_REGS join register allocation.

gcc/ChangeLog:

        * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
        * config/riscv/riscv.cc: Ditto.
---
 gcc/config/riscv/riscv.cc | 8 +-------
 gcc/config/riscv/riscv.h  | 6 ------
 2 files changed, 1 insertion(+), 13 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 209d9a53e7b..3b7804b7501 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -293,7 +293,7 @@ const enum reg_class 
riscv_regno_to_class[FIRST_PSEUDO_REGISTER] = {
   FP_REGS,     FP_REGS,        FP_REGS,        FP_REGS,
   FP_REGS,     FP_REGS,        FP_REGS,        FP_REGS,
   FP_REGS,     FP_REGS,        FP_REGS,        FP_REGS,
-  FRAME_REGS,  FRAME_REGS,     VL_REGS,        VTYPE_REGS,
+  FRAME_REGS,  FRAME_REGS,     NO_REGS,        NO_REGS,
   NO_REGS,     NO_REGS,        NO_REGS,        NO_REGS,
   NO_REGS,     NO_REGS,        NO_REGS,        NO_REGS,
   NO_REGS,     NO_REGS,        NO_REGS,        NO_REGS,
@@ -5831,12 +5831,6 @@ riscv_class_max_nregs (reg_class_t rclass, machine_mode 
mode)
   if (reg_class_subset_p (rclass, V_REGS))
     return riscv_hard_regno_nregs (V_REG_FIRST, mode);
 
-  if (reg_class_subset_p (rclass, VL_REGS))
-    return 1;
-
-  if (reg_class_subset_p (rclass, VTYPE_REGS))
-    return 1;
-
   return 0;
 }
 
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 0ab739bd6eb..02e1224c3cd 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -462,8 +462,6 @@ enum reg_class
   GR_REGS,                     /* integer registers */
   FP_REGS,                     /* floating-point registers */
   FRAME_REGS,                  /* arg pointer and frame pointer */
-  VL_REGS,                     /* vl register */
-  VTYPE_REGS,                  /* vtype register */
   VM_REGS,                     /* v0.t registers */
   VD_REGS,                     /* vector registers except v0.t */
   V_REGS,                      /* vector registers */
@@ -487,8 +485,6 @@ enum reg_class
   "GR_REGS",                                                           \
   "FP_REGS",                                                           \
   "FRAME_REGS",                                                                
\
-  "VL_REGS",                                                           \
-  "VTYPE_REGS",                                                                
\
   "VM_REGS",                                                           \
   "VD_REGS",                                                           \
   "V_REGS",                                                            \
@@ -514,8 +510,6 @@ enum reg_class
   { 0xffffffff, 0x00000000, 0x00000000, 0x00000000 },  /* GR_REGS */           
\
   { 0x00000000, 0xffffffff, 0x00000000, 0x00000000 },  /* FP_REGS */           
\
   { 0x00000000, 0x00000000, 0x00000003, 0x00000000 },  /* FRAME_REGS */        
\
-  { 0x00000000, 0x00000000, 0x00000004, 0x00000000 },  /* VL_REGS */           
\
-  { 0x00000000, 0x00000000, 0x00000008, 0x00000000 },  /* VTYPE_REGS */        
\
   { 0x00000000, 0x00000000, 0x00000000, 0x00000001 },  /* V0_REGS */           
\
   { 0x00000000, 0x00000000, 0x00000000, 0xfffffffe },  /* VNoV0_REGS */        
\
   { 0x00000000, 0x00000000, 0x00000000, 0xffffffff },  /* V_REGS */            
\
-- 
2.37.2

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