[PATCH] rs6000: Don't ICE when compiling the __builtin_vec_xst_trunc built-in [PR109178]

[Peter Bergner via Gcc-patches]

When we expand the __builtin_vec_xst_trunc built-in, we use the wrong mode
for the MEM operand which causes an unrecognizable insn ICE.  The solution
is to use the correct TMODE mode.

Is this ok for trunk and gcc12 assuming my bootstraps and regtests show
no regressions?

Peter


gcc/
        PR target/109178
        * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.

gcc/testsuite/
        PR target/109178
        * gcc.target/powerpc/pr109178.c: New test.

diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index 737a5c42bfb..83c28cd8af3 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -2933,7 +2933,7 @@ stv_expand_builtin (insn_code icode, rtx *op,
 
       rtx addr;
       if (op[1] == const0_rtx)
-       addr = gen_rtx_MEM (Pmode, op[2]);
+       addr = gen_rtx_MEM (tmode, op[2]);
       else
        {
          op[1] = copy_to_mode_reg (Pmode, op[1]);
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109178.c 
b/gcc/testsuite/gcc.target/powerpc/pr109178.c
new file mode 100644
index 00000000000..0f6e2d6b2eb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr109178.c
@@ -0,0 +1,13 @@
+/* PR target/109178 */
+/* { dg-require-effective-target int128 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Verify we do not ICE on the following.  */
+
+typedef __attribute__ ((altivec (vector__))) signed __int128 v1ti_t;
+
+void
+foo (signed int *dst, v1ti_t src)
+{
+  __builtin_vec_xst_trunc(src, 0, dst);
+}