On 4/12/23 00:21, Jakub Jelinek wrote:
On Tue, Apr 11, 2023 at 07:26:07PM -0600, Jeff Law wrote:
I did bootstrap on riscv, but not a regression test, that's spinning right
now.
Jeff
diff --git a/gcc/combine.cc b/gcc/combine.cc
index 22bf8e1ec89..c41d8a09b3b 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -10055,9 +10055,10 @@ simplify_and_const_int_1 (scalar_int_mode mode, rtx
varop,
/* See what bits may be nonzero in VAROP. Unlike the general case of
a call to nonzero_bits, here we don't care about bits outside
- MODE. */
+ MODE unless WORD_REGISTER_OPERATIONS is true. */
I would have expected something like
WORD_REGISTER_OPERATIONS && known_le (GET_MODE_PRECISION (mode), BITS_PER_WORD)
as the condition to use word_mode, rather than just
WORD_REGISTER_OPERATIONS. In both spots. Because larger modes should be
used as is, not a narrower word_mode instead of them.
Agreed.
Jeff
