2023-03-02 Michael Collison <colli...@rivosinc.com> Vineet Gupta <vine...@rivosinc.com>
* gcc.target/riscv/rvv/autovec: New directory for autovectorization tests. * gcc.target/riscv/rvv/autovec/loop-add-rv32.c: New test to verify code generation of vector add on rv32. * gcc.target/riscv/rvv/autovec/loop-add.c: New test to verify code generation of vector add on rv64. * gcc.target/riscv/rvv/autovec/loop-sub-rv32.c: New test to verify code generation of vector subtract on rv32. * gcc.target/riscv/rvv/autovec/loop-sub.c: New test to verify code generation of vector subtract on rv64. --- .../riscv/rvv/autovec/loop-add-rv32.c | 24 +++++++++++++++++++ .../gcc.target/riscv/rvv/autovec/loop-add.c | 24 +++++++++++++++++++ .../riscv/rvv/autovec/loop-sub-rv32.c | 24 +++++++++++++++++++ .../gcc.target/riscv/rvv/autovec/loop-sub.c | 24 +++++++++++++++++++ 4 files changed, 96 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add-rv32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub-rv32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add-rv32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add-rv32.c new file mode 100644 index 00000000000..bdc3b6892e9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add-rv32.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2 -ftree-vectorize -march=rv32gcv -mabi=ilp32d" } */ + +#include <stdint.h> + +#define TEST_TYPE(TYPE) \ + void vadd_##TYPE (TYPE *dst, TYPE *a, TYPE *b, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = a[i] + b[i]; \ + } + +/* *int8_t not autovec currently. */ +#define TEST_ALL() \ + TEST_TYPE(int16_t) \ + TEST_TYPE(uint16_t) \ + TEST_TYPE(int32_t) \ + TEST_TYPE(uint32_t) \ + TEST_TYPE(int64_t) \ + TEST_TYPE(uint64_t) + +TEST_ALL() + +/* { dg-final { scan-assembler-times {\tvadd\.vv} 6 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add.c new file mode 100644 index 00000000000..d7f992c7d27 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-add.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2 -ftree-vectorize -march=rv64gcv -mabi=lp64d" } */ + +#include <stdint.h> + +#define TEST_TYPE(TYPE) \ + void vadd_##TYPE (TYPE *dst, TYPE *a, TYPE *b, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = a[i] + b[i]; \ + } + +/* *int8_t not autovec currently. */ +#define TEST_ALL() \ + TEST_TYPE(int16_t) \ + TEST_TYPE(uint16_t) \ + TEST_TYPE(int32_t) \ + TEST_TYPE(uint32_t) \ + TEST_TYPE(int64_t) \ + TEST_TYPE(uint64_t) + +TEST_ALL() + +/* { dg-final { scan-assembler-times {\tvadd\.vv} 6 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub-rv32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub-rv32.c new file mode 100644 index 00000000000..7d0a40ec539 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub-rv32.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2 -ftree-vectorize -march=rv32gcv -mabi=ilp32d" } */ + +#include <stdint.h> + +#define TEST_TYPE(TYPE) \ + void vadd_##TYPE (TYPE *dst, TYPE *a, TYPE *b, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = a[i] - b[i]; \ + } + +/* *int8_t not autovec currently. */ +#define TEST_ALL() \ + TEST_TYPE(int16_t) \ + TEST_TYPE(uint16_t) \ + TEST_TYPE(int32_t) \ + TEST_TYPE(uint32_t) \ + TEST_TYPE(int64_t) \ + TEST_TYPE(uint64_t) + +TEST_ALL() + +/* { dg-final { scan-assembler-times {\tvsub\.vv} 6 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub.c new file mode 100644 index 00000000000..c8900884f83 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/loop-sub.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2 -ftree-vectorize -march=rv64gcv -mabi=lp64d" } */ + +#include <stdint.h> + +#define TEST_TYPE(TYPE) \ + void vadd_##TYPE (TYPE *dst, TYPE *a, TYPE *b, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = a[i] - b[i]; \ + } + +/* *int8_t not autovec currently. */ +#define TEST_ALL() \ + TEST_TYPE(int16_t) \ + TEST_TYPE(uint16_t) \ + TEST_TYPE(int32_t) \ + TEST_TYPE(uint32_t) \ + TEST_TYPE(int64_t) \ + TEST_TYPE(uint64_t) + +TEST_ALL() + +/* { dg-final { scan-assembler-times {\tvsub\.vv} 6 } } */ -- 2.34.1