The predicates of ashift to lea post-reload splitter were too broad so the splitter tried to convert the mask shift instruction. Tighten operand predicates to match only general registers.
gcc/ChangeLog: PR target/109733 * config/i386/predicates.md (index_reg_operand): New predicate. * config/i386/i386.md (ashift to lea splitter): Use general_reg_operand and index_reg_operand predicates. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d49f1cdc3fe..63207fc9305 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -13331,8 +13331,8 @@ (define_insn_and_split "*ashl<mode>3_1_slp" ;; Convert ashift to the lea pattern to avoid flags dependency. (define_split - [(set (match_operand:SWI 0 "register_operand") - (ashift:SWI (match_operand:SWI 1 "index_register_operand") + [(set (match_operand:SWI 0 "general_reg_operand") + (ashift:SWI (match_operand:SWI 1 "index_reg_operand") (match_operand 2 "const_0_to_3_operand"))) (clobber (reg:CC FLAGS_REG))] "reload_completed @@ -13350,9 +13350,9 @@ (define_split ;; Convert ashift to the lea pattern to avoid flags dependency. (define_split - [(set (match_operand:DI 0 "register_operand") + [(set (match_operand:DI 0 "general_reg_operand") (zero_extend:DI - (ashift:SI (match_operand:SI 1 "index_register_operand") + (ashift:SI (match_operand:SI 1 "index_reg_operand") (match_operand 2 "const_0_to_3_operand")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && reload_completed diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 878b144b0fb..362266e1f6c 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -32,6 +32,11 @@ (define_predicate "general_reg_operand" (and (match_code "reg") (match_test "GENERAL_REGNO_P (REGNO (op))"))) +;; True if the operand is an INDEX class register. +(define_predicate "index_reg_operand" + (and (match_code "reg") + (match_test "INDEX_REGNO_P (REGNO (op))"))) + ;; True if the operand is a nonimmediate operand with GENERAL class register. (define_predicate "nonimmediate_gr_operand" (if_then_else (match_code "reg")