I plan to implement BF16 vector in GCC but still waiting for ISA ratified since GCC policy doesn't allow un-ratified ISA.
Currently, we are working on INT8,INT16,INT32,INT64,FP16,FP32,FP64 auto-vectorizaiton. It should very simple BF16 in current vector framework in GCC. Thanks. juzhe.zh...@rivai.ai From: Li, Pan2 Date: 2023-06-01 14:57 To: juzhe.zh...@rivai.ai Subject: FW: [RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm. FYI. -----Original Message----- From: Gcc-patches <gcc-patches-bounces+pan2.li=intel....@gcc.gnu.org> On Behalf Of Jin Ma via Gcc-patches Sent: Thursday, June 1, 2023 2:51 PM To: gcc-patches@gcc.gnu.org Cc: shi...@iscas.ac.cn; kito.ch...@gmail.com; Jin Ma <ji...@linux.alibaba.com> Subject: [RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm. hi, Are there any new developments about Zfb? Are there any plans to implement the Zvfbfmin and Zvfbfwma expansion? I see that Zfb is being reviewed in llvm, maybe we should do the same on gcc. Ref: https://reviews.llvm.org/D151313 https://reviews.llvm.org/D150929
