This patch fixes PR target/110083, an ICE-on-valid regression exposed by my recent PTEST improvements (to address PR target/109973). The latent bug (admittedly mine) is that the scalar-to-vector (STV) pass doesn't update or delete REG_EQUAL notes attached to COMPARE instructions. As a result the operands of COMPARE would be mismatched, with the register transformed to V1TImode, but the immediate operand left as const_wide_int, which is valid for TImode but not V1TImode. This remained latent when the STV conversion converted the mode of the COMPARE to CCmode, with later passes recognizing the REG_EQUAL note is obviously invalid as the modes didn't match, but now that we (correctly) preserve the CCZmode on COMPARE, the mismatched operand modes trigger a sanity checking ICE downstream.
Fixed by updating (or deleting) any REG_EQUAL notes in convert_compare. Before: (expr_list:REG_EQUAL (compare:CCZ (reg:V1TI 119 [ ivin.29_38 ]) (const_wide_int 0x80000000000000000000000000000000)) After: (expr_list:REG_EQUAL (compare:CCZ (reg:V1TI 119 [ ivin.29_38 ]) (const_vector:V1TI [ (const_wide_int 0x80000000000000000000000000000000) ])) This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-03 Roger Sayle <ro...@nextmovesoftware.com> gcc/ChangeLog PR target/110083 * config/i386/i386-features.cc (scalar_chain::convert_compare): Update or delete REG_EQUAL notes, converting CONST_INT and CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR. gcc/testsuite/ChangeLog PR target/110083 * gcc.target/i386/pr110083.c: New test case. Roger --
diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 3417f6b..4a3b07a 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -980,6 +980,39 @@ rtx scalar_chain::convert_compare (rtx op1, rtx op2, rtx_insn *insn) { rtx src, tmp; + + /* Handle any REG_EQUAL notes. */ + tmp = find_reg_equal_equiv_note (insn); + if (tmp) + { + if (GET_CODE (XEXP (tmp, 0)) == COMPARE + && GET_MODE (XEXP (tmp, 0)) == CCZmode + && REG_P (XEXP (XEXP (tmp, 0), 0))) + { + rtx *op = &XEXP (XEXP (tmp, 0), 1); + if (CONST_SCALAR_INT_P (*op)) + { + if (constm1_operand (*op, GET_MODE (*op))) + *op = CONSTM1_RTX (vmode); + else + { + unsigned n = GET_MODE_NUNITS (vmode); + rtx *v = XALLOCAVEC (rtx, n); + v[0] = *op; + for (unsigned i = 1; i < n; ++i) + v[i] = const0_rtx; + *op = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (n, v)); + } + tmp = NULL_RTX; + } + else if (REG_P (*op)) + tmp = NULL_RTX; + } + + if (tmp) + remove_note (insn, tmp); + } + /* Comparison against anything other than zero, requires an XOR. */ if (op2 != const0_rtx) { diff --git a/gcc/testsuite/gcc.target/i386/pr110083.c b/gcc/testsuite/gcc.target/i386/pr110083.c new file mode 100644 index 0000000..4b38ca8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr110083.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -msse4 -mstv -mno-stackrealign" } */ +typedef int TItype __attribute__ ((mode (TI))); +typedef unsigned int UTItype __attribute__ ((mode (TI))); + +void foo (void) +{ + static volatile TItype ivin, ivout; + static volatile float fv1, fv2; + ivin = ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)); + fv1 = ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)); + fv2 = ivin; + ivout = fv2; + if (ivin != ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)) + || ((((128) > sizeof (TItype) * 8 - 1)) && ivout != ivin) + || ((((128) > sizeof (TItype) * 8 - 1)) + && ivout != + ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1))) + || fv1 != + (float) ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)) + || fv2 != + (float) ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)) + || fv1 != fv2) + __builtin_abort (); +} +