>> Return true if the operation requires a rounding mode operand. Maybe also
>>call it needs_fp_rounding?
ok
>>What's FMLA? That's SVE I suppose and ours is fmacc?
Yes, the comments is misleading will fix it soon.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-12 22:24
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Support COND_LEN_* patterns
Hi Juzhe,
> +/* Return true if the operation is the floating-point operation need FRM. */
> +static bool
> +need_frm_p (rtx_code code, machine_mode mode)
> +{
> + if (!FLOAT_MODE_P (mode))
> + return false;
> + return code != SMIN && code != SMAX;
> +}
Return true if the operation requires a rounding mode operand. Maybe also
call it needs_fp_rounding?
> + if (need_frm_p (code, mode))
> + emit_nonvlmax_fp_tu_insn (icode, RVV_BINOP_MU, ops, len);
> + else
> + emit_nonvlmax_tu_insn (icode, RVV_BINOP_MU, ops, len);
> + }
This feels like we could decide it inside emit_nonvlmax_tu_insn.
Same for without _tu. But let's keep it like this for now in
order not to stall progress.
> +/* Implement TARGET_PREFERRED_ELSE_VALUE. For binary operations,
> + prefer to use the first arithmetic operand as the else value if
> + the else value doesn't matter, since that exactly matches the SVE
> + destructive merging form. For ternary operations we could either
> + pick the first operand and use FMAD-like instructions or the last
> + operand and use FMLA-like instructions; the latter seems more
> + natural. */
What's FMLA? That's SVE I suppose and ours is fmacc?
Apart from that fine from my side, thanks for supporting this.
Regards
Robin
