A vec_cmpge produces a negation. Replace this negation by swapping the two selection choices of a vec_sel based on the result of the vec_cmpge.
Bootstrapped and regression tested on s390x. gcc/ChangeLog: * config/s390/vx-builtins.md: New vsel pattern. gcc/testsuite/ChangeLog: * gcc.target/s390/vector/vec-cmpge.c: New test. Signed-off-by: Juergen Christ <jchr...@linux.ibm.com> --- gcc/config/s390/vx-builtins.md | 11 +++++++++++ .../gcc.target/s390/vector/vec-cmpge.c | 18 ++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index f4248c55d4ec..0ce3ff6ef4a6 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -530,6 +530,17 @@ "vsel\t%v0,%1,%2,%3" [(set_attr "op_type" "VRR")]) +(define_insn "vsel<mode>_swapped" + [(set (match_operand:V_HW_FT 0 "register_operand" "=v") + (ior:V_HW_FT + (and:V_HW_FT (not:V_HW_FT (match_operand:V_HW_FT 3 "register_operand" "v")) + (match_operand:V_HW_FT 1 "register_operand" "v")) + (and:V_HW_FT (match_dup 3) + (match_operand:V_HW_FT 2 "register_operand" "v"))))] + "TARGET_VX" + "vsel\t%v0,%2,%1,%3" + [(set_attr "op_type" "VRR")]) + ; Vector sign extend to doubleword diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c b/gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c new file mode 100644 index 000000000000..eb188690ae41 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c @@ -0,0 +1,18 @@ +/* Check that vec_sel absorbs a negation generated by vec_cmpge. */ + +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=z13" } */ + +typedef __attribute__((vector_size(16))) unsigned char uv16qi; + +#include <vecintrin.h> + +void f(char *res, uv16qi ctrl) +{ + uv16qi a = vec_splat_u8(0xfe); + uv16qi b = vec_splat_u8(0x80); + uv16qi mask = vec_cmpge(ctrl, b); + *(uv16qi *)res = vec_sel(a, b, mask); +} + +/* { dg-final { scan-assembler-not "vno\t" } } */ -- 2.39.3