Hi Lehua, thanks for the explanation.
> My current method is still to keep the operand 2 of vcond_mask as a > register, but the pattern of mov_vec_const_0 is simplified, so that > the corresponding combine pattern can be more simple. That's the only > reason I split the vcond_mask into three patterns. My "problem" with the separate split it that it really sticks out and everybody seeing it would wonder why we need it. It's not that bad of course but it appears as if we messed up somewhere else. I checked and I don't see additional FAILs with the vmask pattern that additionally allows a const0 operand (that is forced into a register) and a force_reg in abs:VF. Would you mind re-checking if we can avoid the extra "vec_duplicate_const_0" by changing the other affected patterns in a similar manner? I really didn't verify in-depth so if we needed to add a force_reg to every pattern we might need to reconsider. Still, I'd be unsure if I preferred the "vec_dup_const_0" over additional force_regs ;) Regards Robin
