On Tue, Dec 5, 2023 at 8:28 AM Jakub Jelinek <ja...@redhat.com> wrote: > > Hi! > > The following testcase ICEs in the movabsq $(i32 << shift), r64 peephole2 > I've added a while back to use smaller code than movabsq if possible. > If i32 is 0xfa1e0ff3 and shift is not divisible by 8, then it creates > an invalid insn (as 0xfa1e0ff3 CONST_INT is not allowed as > x86_64_immediate_operand nor x86_64_zext_immediate_operand), the peephole2 > even triggers on it again and again (this time with shift 0) until it gives > up. > > The following patch fixes that. As ix86_endbr_immediate_operand needs a > CONST_INT and it is hopefully rare, I chose to use FAIL rather than handling > it in the condition (where I'd probably need to call ctz_hwi again etc.). > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2023-12-04 Jakub Jelinek <ja...@redhat.com> > > PR target/112845 > * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL > if the new immediate is ix86_endbr_immediate_operand.
OK. Thanks, Uros. > --- gcc/config/i386/i386.md.jj 2023-12-01 08:10:42.287330513 +0100 > +++ gcc/config/i386/i386.md 2023-12-04 16:22:23.497986229 +0100 > @@ -2699,7 +2699,10 @@ (define_peephole2 > (clobber (reg:CC FLAGS_REG))])] > { > int shift = ctz_hwi (UINTVAL (operands[1])); > - operands[1] = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode); > + rtx op1 = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode); > + if (ix86_endbr_immediate_operand (op1, VOIDmode)) > + FAIL; > + operands[1] = op1; > operands[2] = gen_int_mode (shift, QImode); > }) > > --- gcc/testsuite/gcc.dg/pr112845.c.jj 2023-12-04 16:25:31.228350449 +0100 > +++ gcc/testsuite/gcc.dg/pr112845.c 2023-12-04 16:25:26.740413464 +0100 > @@ -0,0 +1,9 @@ > +/* PR target/112845 */ > +/* { dg-do compile { target cet } } */ > +/* { dg-options "-Os -fcf-protection" } */ > + > +unsigned long long > +foo (void) > +{ > + return 0xfa1e0ff3ULL << 3; > +} > > Jakub >