Recently notice there is a XPASS in RISC-V: XPASS: gcc.dg/vect/bb-slp-43.c -flto -ffat-lto-objects scan-tree-dump-not slp2 "vector operands from scalars" XPASS: gcc.dg/vect/bb-slp-43.c scan-tree-dump-not slp2 "vector operands from scalars"
And checked both ARM SVE and RVV: https://godbolt.org/z/T9cPa7fh3 both has the same dump slp2. So I guess ARM SVE has the same XPASS in this test. gcc/testsuite/ChangeLog: * gcc.dg/vect/bb-slp-43.c: Remove xfail for variable length. --- gcc/testsuite/gcc.dg/vect/bb-slp-43.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-43.c b/gcc/testsuite/gcc.dg/vect/bb-slp-43.c index dad2d24262d..40bd2e0dfbf 100644 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-43.c +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-43.c @@ -14,4 +14,4 @@ f (int *restrict x, short *restrict y) } /* { dg-final { scan-tree-dump-not "mixed mask and nonmask" "slp2" } } */ -/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } xfail { vect_variable_length && { ! vect256 } } } } } */ +/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } } } } */ -- 2.36.3
