on 2024/1/6 07:37, Michael Meissner wrote: > This patch re-enables generating load and store vector pair instructions when > doing certain memory copy operations when -mcpu=future is used. > > During power10 development, it was determined that using store vector pair > instructions were problematical in a few cases, so we disabled generating load > and store vector pair instructions for memory options by default. This patch > re-enables generating these instructions if -mcpu=future is used. > > The patches have been tested on both little and big endian systems. Can I > check > it into the master branch? > > 2024-01-05 Michael Meissner <meiss...@linux.ibm.com> > > gcc/ > > * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add > -mblock-ops-vector-pair.
Nit: s/-mblock-ops-vector-pair/OPTION_MASK_BLOCK_OPS_VECTOR_PAIR/ > (POWERPC_MASKS): Likewise. > --- > gcc/config/rs6000/rs6000-cpus.def | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/gcc/config/rs6000/rs6000-cpus.def > b/gcc/config/rs6000/rs6000-cpus.def > index 8754635f3d9..b6cd6d8cc84 100644 > --- a/gcc/config/rs6000/rs6000-cpus.def > +++ b/gcc/config/rs6000/rs6000-cpus.def > @@ -90,6 +90,7 @@ > > /* Flags for a potential future processor that may or may not be delivered. > */ > #define ISA_FUTURE_MASKS (ISA_3_1_MASKS_SERVER \ > + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ > | OPTION_MASK_FUTURE) OK with incorporating change s/ISA_FUTURE_MASKS/ISA_FUTURE_MASKS_SERVER/. Thanks! BR, Kewen > > /* Flags that need to be turned off if -mno-power9-vector. */ > @@ -127,6 +128,7 @@ > > /* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */ > #define POWERPC_MASKS (OPTION_MASK_ALTIVEC > \ > + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ > | OPTION_MASK_CMPB \ > | OPTION_MASK_CRYPTO \ > | OPTION_MASK_DFP \
