What target/config are these failures on?
I tried rv64gcv, rv64gc, rv32gcv, and rv32gc with RUNTESTFLAGS="rvv.exp"
and don't see these failures.
Thanks,
Patrick
On 1/25/24 23:20, juzhe.zh...@rivai.ai wrote:
This patch causes the following regression:
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O0 (test for excess
errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O1 (test for excess
errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 (test for excess
errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto
-fno-use-linker-plugin -flto-partition=none (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto
-fuse-linker-plugin -fno-fat-lto-objects (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3
-fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer
-finline-functions (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3 -g (test for
excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -Os (test for excess
errors)
I suggest you add :
/* { dg-require-effective-target rv64 } */
/* { dg-require-effective-target riscv_v } */
------------------------------------------------------------------------
juzhe.zh...@rivai.ai
*From:* Patrick O'Neill <mailto:patr...@rivosinc.com>
*Date:* 2024-01-24 09:20
*To:* juzhe.zh...@rivai.ai; gcc-patches
<mailto:gcc-patches@gcc.gnu.org>
*CC:* kito.cheng <mailto:kito.ch...@gmail.com>; law
<mailto:l...@gcc.gnu.org>; rdapp <mailto:rd...@gcc.gnu.org>;
vineetg <mailto:vine...@gcc.gnu.org>
*Subject:* [Committed] RISC-V: Add regression test for vsetvl bug
pr113429
The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.
PR target/113429
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
Signed-off-by: Patrick O'Neill<patr...@rivosinc.com>
---
.../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 00000000000..05c3eeecb94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+ return p1 / q;
+}
+
+void s(unsigned p1) {
+ b = (b ^ p1) & 255;
+}
+
+static long t() {
+ long u;
+ signed char v;
+ d = 1;
+ for (; d <= 4; d++) {
+ j = 0;
+ for (; j <= 4; j++) {
+ v = 0;
+ for (; v <= 4; v++) {
+ if (m[v][v])
+ continue;
+ c = 0;
+ for (; c <= 4; c++) {
+ n = 0;
+ for (; n <= 4; n++) {
+ int *w = &e;
+ long r = v;
+ u = r == 0 ? a : a % r;
+ h |= u;
+ *w = g;
+ --m[n][c];
+ f &= *o;
+ }
+ }
+ if (p((i < 3) ^ 9, k))
+ ;
+ else if (v)
+ return 0;
+ }
+ }
+ }
+ return 1;
+}
+
+static char x() {
+ for (;;) {
+ t();
+ if (l)
+ return 0;
+ }
+}
+
+int main() {
+ x();
+ s(e & 255);
+ if (b == 0)
+ return 0;
+ else
+ return 1;
+}
--
2.34.1
