On Fri, 23 Feb 2024, Jakub Jelinek wrote: > On Fri, Feb 23, 2024 at 02:22:19PM +0000, Andrew Stubbs wrote: > > On 23/02/2024 13:02, Jakub Jelinek wrote: > > > On Fri, Feb 23, 2024 at 12:58:53PM +0000, Andrew Stubbs wrote: > > > > This is a follow-up to the previous patch to ensure that integer vector > > > > bit-masks do not have excess bits set. It fixes a bug, observed on > > > > amdgcn, in which the mask could be incorrectly set to zero, resulting in > > > > wrong-code. > > > > > > > > The mask was broken when nunits==32. The patched version will probably > > > > be broken for nunits==64, but I don't think any current targets have > > > > masks with more than 64 bits. > > > > > > > > OK for mainline? > > > > > > > > Andrew > > > > > > > > gcc/ChangeLog: > > > > > > > > * expr.cc (store_constructor): Use 64-bit shifts. > > > > > > No, this isn't 64-bit shift on all hosts. > > > Use HOST_WIDE_INT_1U instead. > > > > OK, I did wonder if there was a proper way to do it. :) > > > > How about this? > > If you change the other two GEN_INT ((1 << nunits) - 1) occurrences in > expr.cc the same way, then LGTM.
There's also two in dojump.cc Richard.
