On 13 June 2012 02:32, Hans-Peter Nilsson <hans-peter.nils...@axis.com> wrote:
>> From: Hans-Peter Nilsson <h...@axis.com>
>> Date: Mon, 11 Jun 2012 00:59:57 +0200
>
>> > From: Michael Hope <michael.h...@linaro.org>
>> > Date: Mon, 11 Jun 2012 00:04:19 +0200
>>
>> > On 8 June 2012 16:53, Hans-Peter Nilsson <hans-peter.nils...@axis.com>
>> > wrote:
>> > >> From: Hans-Peter Nilsson <h...@axis.com>
>> > >> Date: Fri, 8 Jun 2012 06:29:04 +0200
>> > >
>> > >> > From: Michael Hope <michael.h...@linaro.org>
>> > >> > Date: Fri, 8 Jun 2012 05:50:52 +0200
>> > >> > The combination of
>> > >> > older Linux ARM kernels and GCC 4.7 gives a faulty kernel.
>> > >>
>> > >> We're in agreement!
>> > >
>> > > Oh wait sorry, my bad, I misread. Instead of "gives a faulty
>> > > kernel", I'd say "for ARMv6 and later (not -M), gives faulty
>> > > user-space code". Maybe the kernel too, I can't say; there was
>> > > IIRC no sign of it.
>
> But (at least) after removing some local changed defaults,
> there's at boot-time a lot of:
>
> [ 0.950000] Unhandled fault: alignment exception (0x801) at 0xc821ddee
That's a kernel address. What does /proc/kallsyms say is there?
For reference, the message comes from
arch/arm/mm/alignment.c:alignment_init() from the default trap
handler. The lines just before this disable the unaligned trap for
usermode:
if (cpu_is_v6_unaligned()) {
cr_alignment &= ~CR_A;
cr_no_alignment &= ~CR_A;
set_cr(cr_alignment);
ai_usermode = safe_usermode(ai_usermode, false);
}
Support was added by Russell King in 2008-12 and updated by Dave
Martin on 2011-07.
Out of interest, does your CPU report support for unaligned access via
CP15 CR1? It's bit 22 and shows during boot. My board shows:
CPU: ARMv7 Processor [411fc092] revision 2 (ARMv7), cr=50c5387d
>> > Is there a bugzilla ticket logged for this? I'd like to try to reproduce
>> > it.
>
> Here's a shorter case I'll attach to a PR for this unless it
> gets resolved one way or another soonish. Remember, you'll have
> to run this on a pre-3.2 kernel with CONFIG_ALIGNMENT_TRAP on
> (the default) and you have to compile for ARM v6 or later (as in
> -march=armv6). Using gcc-4.7.1-rc1 should do, most likely
> earlier revisions too.
>
> __attribute__ ((__noinline__, __noclone__))
> void doit(char *x)
> {
> asm ("");
> __builtin_strcpy (x, "stat");
> }
>
> int main(void)
> {
> char x[30];
> doit(x + 1);
> doit(x);
> __builtin_exit (0);
> }
This compiles into a five byte unaligned memcpy:
doit:
mov r2, r0
movw r3, #:lower16:.LC0
movt r3, #:upper16:.LC0
ldr r0, [r3, #0] @ unaligned
ldrb r3, [r3, #4] @ zero_extendqisi2
str r0, [r2, #0] @ unaligned
strb r3, [r2, #4]
bx lr
which is correct. The test case runs on my boards and kernels as
noted below. /proc/cpu/alignment doesn't change so the loads and
stores were handled by the hardware.
I added:
__attribute__ ((__noinline__, __noclone__))
long long doit2(char *x)
{
asm ("");
return *(long long *)x;
}
which becomes:
doit2:
ldmia r0, {r0, r1}
bx lr
ldm must be aligned. The program runs to completion but this time the
kernel traps and handles the unaligned load:
cbuild@ursa1:~/bugs$ cat /proc/cpu/alignment > before
cbuild@ursa1:~/bugs$ ./a.out
cbuild@ursa1:~/bugs$ cat /proc/cpu/alignment > after
cbuild@ursa1:~/bugs$ diff -u before after
--- before 2012-06-12 22:29:20.428268001 +0000
+++ after 2012-06-12 22:29:26.107955560 +0000
@@ -1,8 +1,8 @@
-User: 3
+User: 4
System: 7
Skipped: 0
Half: 0
Word: 0
DWord: 0
-Multi: 10
+Multi: 11
User faults: 2 (fixup)
>> > It's interesting as we backported the patch into the Linaro GCC that
>> > was used to build Ubuntu Precise and didn't find any faults.
>
> I have no idea why you didn't run into this, unless it was one
> of the obvious reasons: not building for ARM v6 or the kernel
> was 3.2 or later, or configured with CONFIG_ALIGNMENT_TRAP off.
> Or other local patches of yours.
Linaro's stock configuration is -march=armv7-a -mtune=cortex-a9
-mthumb. Ubuntu is the same. I can't reproduce the fault on a
PandaBoard with omapzoom 2.6.35, Ubuntu 3.2.14, Ubuntu Precise 4.6.3
GCC, or plain gcc-4.7.1-RC-20120606. The configurations for the
kernels are at:
*
http://bazaar.launchpad.net/~linaro-toolchain-dev/cbuild/hardware/view/head:/ursa/r2/config
*
http://bazaar.launchpad.net/~linaro-toolchain-dev/cbuild/hardware/view/head:/distro/precise/r1/config
and have CONFIG_ALIGNMENT_TRAP on.
-- Michael
