Maxim Kuvyrkov <ma...@codesourcery.com> writes: > On 14/06/2012, at 6:50 AM, Richard Sandiford wrote: >> Maxim Kuvyrkov <ma...@codesourcery.com> writes: >>> diff --git a/gcc/config/mips/sync.md b/gcc/config/mips/sync.md >>> index 604aefa..ac953b5 100644 >>> --- a/gcc/config/mips/sync.md >>> +++ b/gcc/config/mips/sync.md >>> @@ -607,10 +607,32 @@ >>> (match_operand:GPR 1 "memory_operand") >>> (match_operand:GPR 2 "arith_operand") >>> (match_operand:SI 3 "const_int_operand")] >>> - "GENERATE_LL_SC" >>> + "GENERATE_LL_SC || ISA_HAS_SWAP" >>> { >>> + if (!ISA_HAS_SWAP) >>> emit_insn (gen_atomic_exchange<mode>_llsc (operands[0], operands[1], >>> operands[2], operands[3])); >>> + else >> >> Please swap this round so that the ISA_HAS_SWAP stuff comes first. >> The LLSC code then remains the fallback if new variations are added. > > OK. > >> >>> + { >>> + rtx addr; >>> + >>> + gcc_assert (MEM_P (operands[1])); >>> + addr = XEXP (operands[1], 0); >>> + if (!REG_P (addr) && can_create_pseudo_p ()) >>> + /* Workaround a reload bug that hits (lo_sum (reg) (symbol_ref)) >>> + addresses. Spill the address to a register upfront to simplify >>> + reload's job. */ >>> + addr = force_reg (GET_MODE (addr), addr); >> >> If there's a reload bug here, let's fix it. But... > > After a chat with Bernd Schmidt, this is not a bug. I've already fixed the > patch per yours and Bernd's instructions. Do you want to look through an > updated patch or should I just commit it after retesting?
Yeah, please send the revised patch. Thanks, Richard