On Mon, Jun 17, 2024 at 08:16:34AM +0200, Richard Biener wrote:
> On Mon, 17 Jun 2024, Kewen.Lin wrote:
>
> > Hi Richi,
> >
> > on 2024/6/14 18:31, Richard Biener wrote:
> > > The following retires vcond{,u,eq} optabs by stopping to use them
> > > from the middle-end. Targets instead (should) implement vcond_mask
> > > and vec_cmp{,u,eq} optabs. The PR this change refers to lists
> > > possibly affected targets - those implementing these patterns,
> > > and in particular it lists mips, sparc and ia64 as targets that
> > > most definitely will regress while others might simply remove
> > > their vcond{,u,eq} patterns.
> > >
> > > I'd appreciate testing, I do not expect fallout for x86 or arm/aarch64.
> > > I know riscv doesn't implement any of the legacy optabs. But less
> > > maintained vector targets might need adjustments.
> >
> > Thanks for making this change, this patch can be bootstrapped on ppc64{,le}
> > but both have one failure on gcc/testsuite/gcc.target/powerpc/pr66144-3.c,
> > by looking into it, I found it just exposed one oversight in the current
> > rs6000 vcond_mask support (the condition mask location is wrong), so I think
> > this change is fine for rs6000 port, I'll also test SPEC2017 for this (with
> > rs6000 vcond_mask change) soon.
>
> Btw, for those targets where the patch works out fine it would be nice
> to delete their vcond{,u,eq} expanders (and double-check that doesn't
> cause issues on its own).
>
> Can target maintainers note whether their targets support all condition
> codes for their vector comparisons (including FP variants)? And
> whether they choose to implement all condition codes in vec_cmp
> and adjust with inversion / operand swapping for not supported cases?
On s390 we support all comparison operations with inverse / operand
swapping via s390_expand_vec_compare. However, we still have some
failures for which I opened PR115519. Currently it is unclear to me
what precisely is missing and will have a further look. vcond_mask
expander is also implemented for all modes.
Cheers,
Stefan
>
> Thanks,
> Richard.
>
> > BR,
> > Kewen
> >
> > >
> > > I want to get rid of those optabs for GCC 15. If I don't hear from
> > > you I will assume your target is fine.
> > >
> > > Thanks,
> > > Richard.
> > >
> > > PR middle-end/114189
> > > * optabs-query.h (get_vcond_icode): Always return CODE_FOR_nothing.
> > > (get_vcond_eq_icode): Likewise.
> > > ---
> > > gcc/optabs-query.h | 13 ++++---------
> > > 1 file changed, 4 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/gcc/optabs-query.h b/gcc/optabs-query.h
> > > index 0cb2c21ba85..31fbce80175 100644
> > > --- a/gcc/optabs-query.h
> > > +++ b/gcc/optabs-query.h
> > > @@ -112,14 +112,9 @@ get_vec_cmp_eq_icode (machine_mode vmode,
> > > machine_mode mask_mode)
> > > mode CMODE, unsigned if UNS is true, resulting in a value of mode
> > > VMODE. */
> > >
> > > inline enum insn_code
> > > -get_vcond_icode (machine_mode vmode, machine_mode cmode, bool uns)
> > > +get_vcond_icode (machine_mode, machine_mode, bool)
> > > {
> > > - enum insn_code icode = CODE_FOR_nothing;
> > > - if (uns)
> > > - icode = convert_optab_handler (vcondu_optab, vmode, cmode);
> > > - else
> > > - icode = convert_optab_handler (vcond_optab, vmode, cmode);
> > > - return icode;
> > > + return CODE_FOR_nothing;
> > > }
> > >
> > > /* Return insn code for a conditional operator with a mask mode
> > > @@ -135,9 +130,9 @@ get_vcond_mask_icode (machine_mode vmode,
> > > machine_mode mmode)
> > > mode CMODE (only EQ/NE), resulting in a value of mode VMODE. */
> > >
> > > inline enum insn_code
> > > -get_vcond_eq_icode (machine_mode vmode, machine_mode cmode)
> > > +get_vcond_eq_icode (machine_mode, machine_mode)
> > > {
> > > - return convert_optab_handler (vcondeq_optab, vmode, cmode);
> > > + return CODE_FOR_nothing;
> > > }
> > >
> > > /* Enumerates the possible extraction_insn operations. */
> >
> >
>
> --
> Richard Biener <[email protected]>
> SUSE Software Solutions Germany GmbH,
> Frankenstrasse 146, 90461 Nuernberg, Germany;
> GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)