From: Pan Li <pan2...@intel.com> The sat alu related testcase check the rtl dump for the standard name like .SAT_TRUNC exist or not. But the rtl pass expand is somehow impressionable by the middle-end change or debug information. Like below new appearance recently.
Replacing Expressions _5 replace with --> _5 = .SAT_TRUNC (x_3(D), y_4(D)); [tail call] After that we need to adjust the dump check time and again. This patch would like to switch to tree optimized pass for the standard name check, which is more stable up to a point. The below test suites are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c: Take tree-optimized pass for standard name check, and adjust the times. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c: Ditto. Signed-off-by: Pan Li <pan2...@intel.com> --- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c | 4 ++-- .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c | 4 ++-- 24 files changed, 48 insertions(+), 48 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c index bf83a5cbe66..b3f4c33d813 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_1 (uint8_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c index 01022496ca4..1bef6c83ab0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_1 (uint8_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c index 4f3efb9ec1c..c11a78e00ac 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_1 (uint16_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c index 118a7267dde..8f89f6e96bd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_1 (uint8_t, uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c index 8c1f3caf0e7..8bbb04014a5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_1 (uint32_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c index 400f892001d..b22a26d1a43 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_2 (uint8_t, uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c index 184a5fe6bd0..5f91d16839e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_2 (uint8_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c index 70a096ec383..d05bfa5b088 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_1 (uint16_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c index b4365bd9022..c43da602f90 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_2 (uint16_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c index 614a189d86b..4f97a6132b6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_2 (uint16_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c index 7e000689fab..245820cd2e1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_2 (uint32_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c index 1e9a584eed4..d5bb6071314 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_2 (uint8_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c index 59acd8b7542..d91839fec09 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_3 (uint8_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c index 70563d679dd..16166b901fd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_3 (uint8_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c index bfc504e20f6..e034b887956 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_3 (uint16_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c index 56857340ad1..20ebca98619 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_3 (uint8_t, uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c index a615cfa2ee9..a0170ada72b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_3 (uint32_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c index 457cc374a56..78e2ad39410 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_4 (uint8_t, uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c index c4a09b29c10..b8de4b3f35f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_4 (uint8_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c index e19ea9b6adc..a8a9b37bd0d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_3 (uint16_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c index 772924fa36d..ad8107dd1dc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_4 (uint16_t, uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c index a4b18954e37..3b548ece188 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_4 (uint16_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c index d8c33c5188f..0d12d690f38 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_4 (uint32_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c index 25f6665c79f..c4d87c1b6da 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-rtl-expand-details" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ #include "vec_sat_arith.h" DEF_VEC_SAT_U_TRUNC_FMT_4 (uint8_t, uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ +/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" } } */ /* { dg-final { scan-assembler-times {vnclipu\.wi} 3 } } */ -- 2.43.0