SImode and DImode moves from/to mask registers are valid only with AVX512BW,
so mark relevant alternatives in *movsi_internal and *movdi_internal as such.
Even with the patch, the testcase still fails, but now with:
pr118067.c: In function ‘foo’:
pr118067.c:13:1: internal compiler error: maximum number of generated
reload insns per insn achieved (90)
13 | }
| ^
0x2c3b581 internal_error(char const*, ...)
../../git/gcc/gcc/diagnostic-global-context.cc:517
0xb68938 lra_constraints(bool)
../../git/gcc/gcc/lra-constraints.cc:5411
0xb51a0d lra(_IO_FILE*, int)
../../git/gcc/gcc/lra.cc:2449
0xaf9f4d do_reload
../../git/gcc/gcc/ira.cc:5977
0xafa462 execute
../../git/gcc/gcc/ira.cc:6165
PR target/118067
gcc/ChangeLog:
* config/i386/i386.md (*movdi_internal):
Disable alternatives from/to mask registers without AVX512BW.
(*movsi_internal): Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6edcb6dc657..11815c59c53 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2642,12 +2642,16 @@ (define_insn "*movdi_internal"
[(set (attr "isa")
(cond [(eq_attr "alternative" "0,1,17,18")
(const_string "nox64")
- (eq_attr "alternative" "2,3,4,5,10,11,23,25")
+ (eq_attr "alternative" "2,3,4,5,10,11")
(const_string "x64")
(eq_attr "alternative" "19,20")
(const_string "x64_sse2")
+ (eq_attr "alternative" "23,25")
+ (const_string "x64_avx512bw")
(eq_attr "alternative" "21,22")
(const_string "sse2")
+ (eq_attr "alternative" "24,26,27")
+ (const_string "avx512bw")
]
(const_string "*")))
(set (attr "type")
@@ -2870,6 +2874,8 @@ (define_insn "*movsi_internal"
[(set (attr "isa")
(cond [(eq_attr "alternative" "12,13")
(const_string "sse2")
+ (eq_attr "alternative" "14,15,16,17")
+ (const_string "avx512bw")
]
(const_string "*")))
(set (attr "type")
