> diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> index fb93a6fdd0a..be5e27fc391 100644
> --- a/gcc/config/i386/i386.cc
> +++ b/gcc/config/i386/i386.cc
> @@ -20600,12 +20600,26 @@ ix86_class_likely_spilled_p (reg_class_t rclass)
>    return false;
>  }
>  
> -/* Implement TARGET_IRA_CALLEE_SAVED_REGISTER_COST_SCALE.  */
> +/* Implement TARGET_CALLEE_SAVE_COST.  */
>  
>  static int
> -ix86_ira_callee_saved_register_cost_scale (int)
> -{
> -  return 1;
> +ix86_callee_save_cost (spill_cost_type, unsigned int hard_regno, 
> machine_mode,
> +                    unsigned int, int mem_cost, const HARD_REG_SET &, bool)
> +{
> +  /* Account for the fact that push and pop are shorter and do their
> +     own allocation and deallocation.  */
> +  if (GENERAL_REGNO_P (hard_regno))
> +    {
> +      /* push is 1 byte while typical spill is 4-5 bytes.
> +      ??? We probably should adjust size costs accordingly.
> +      Costs are relative to reg-reg move that has 2 bytes for 32bit
> +      and 3 bytes otherwise.  Be sure that no cost table sets cost
> +      to 2, so we end up with 0.  */
> +      if (mem_cost <= 2 || optimize_function_for_size_p (cfun))
> +     return 1;
> +      return mem_cost - 2;
> +    }
> +  return mem_cost;

This is OK.  In general, I think we could also go with assert on
mem_cost <= 2, since that is kind of bogus setting (I don't think we
will ever need to support x86 CPU with memory stores being as cheap as
reg-reg moves), but current form is good.

Honza

Reply via email to