From: Jaydeep Patil <[email protected]>
Fix ICE occurred in R6 target due to a clobber-list introduced in
MADD/MSUB during combine pass.
gcc/
* config/mips/mips.md: Define new splitters for MADD/MSUB on
the r6 target.
Cherry-picked 180f74c8ebdf13ddac806695d0333af7b924c402
from https://github.com/MIPS/gcc
Signed-off-by: Jaydeep Patil <[email protected]>
Signed-off-by: Faraz Shahbazker <[email protected]>
Signed-off-by: Aleksandar Rakic <[email protected]>
---
gcc/config/mips/mips.md | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 21eb0ac683a..8ebd2e04b91 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -1820,6 +1820,19 @@
;; Split *mul_acc_si if both the source and destination accumulator
;; values are GPRs.
+(define_split
+ [(set (match_operand:SI 0 "d_operand")
+ (plus:SI (mult:SI (match_operand:SI 1 "d_operand")
+ (match_operand:SI 2 "d_operand"))
+ (match_operand:SI 3 "d_operand")))
+ (clobber (match_operand:SI 4 "lo_operand"))
+ (clobber (match_operand:SI 5 "d_operand"))]
+ "reload_completed && ISA_HAS_R6MUL"
+ [(set (match_dup 5)
+ (mult:SI (match_dup 1) (match_dup 2)))
+ (set (match_dup 0) (plus:SI (match_dup 5) (match_dup 3)))]
+ "")
+
(define_split
[(set (match_operand:SI 0 "d_operand")
(plus:SI (mult:SI (match_operand:SI 1 "d_operand")
@@ -2042,6 +2055,19 @@
;; Split *mul_sub_si if both the source and destination accumulator
;; values are GPRs.
+(define_split
+ [(set (match_operand:SI 0 "d_operand")
+ (minus:SI (match_operand:SI 1 "d_operand")
+ (mult:SI (match_operand:SI 2 "d_operand")
+ (match_operand:SI 3 "d_operand"))))
+ (clobber (match_operand:SI 4 "lo_operand"))
+ (clobber (match_operand:SI 5 "d_operand"))]
+ "reload_completed && ISA_HAS_R6MUL"
+ [(set (match_dup 5)
+ (mult:SI (match_dup 2) (match_dup 3)))
+ (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 5)))]
+ "")
+
(define_split
[(set (match_operand:SI 0 "d_operand")
(minus:SI (match_operand:SI 1 "d_operand")
--
2.34.1
