Thanks Robin for suggestion. > Any other ideas? I think I prefer the second option.
I also prefer option 2 which is more straight forward. But there may be question here, the option like --param=gr2vr_xx will be available from the end-user's perspective, and I think we may need to consider even more reaons besides testing friendly. Anyway, we take care of this in other serices patches if no more concerns. Pan -----Original Message----- From: Robin Dapp <[email protected]> Sent: Thursday, April 17, 2025 4:19 PM To: Li, Pan2 <[email protected]>; [email protected] Cc: [email protected]; [email protected]; [email protected]; [email protected]; Chen, Ken <[email protected]>; Liu, Hongtao <[email protected]>; Robin Dapp <[email protected]> Subject: Re: [PATCH 3/3][GCC16-Stage-1] RISC-V: Add testcases for vec_duplicate + vadd.vv combine to vadd.vx Hi Pan, > I am not sure if we have some options additional to below, like > -march=generic, > to ensure that the late-combine will take action as expected in testcases. > > +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ I haven't gone through the rest yet (will take some more days) but yes, I agree. As usual we have at least two options: - Run the tests either only on supported micro-architectures or make the scan test dependent on a specific flag. This flag would be true for a list of uarchs and the list would need to be kept up to date. - Define a param like --param=force_vv_vx or --param=gr2vr_cost=0 that would adjust the register-move costs. I actually don't like exposing costs like that but it would be helpful for testing. Any other ideas? I think I prefer the second option. -- Regards Robin
