SMALL_REGISTER_CLASSES was added by
commit c98f874233428d7e6ba83def7842fd703ac0ddf1
Author: James Van Artsdalen <[email protected]>
Date: Sun Feb 9 13:28:48 1992 +0000
Initial revision
which became TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P. It is false from
day 1 for i386. Since x86-64 doubles the number of registers, Change
TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P to return false for x86-64
and update decrease_live_ranges_number to skip hard register if
targetm.class_likely_spilled_p returns true. These extend the live
range of rbp, r8-r31 and xmm1-xmm31 registers.
PR target/118996
* ira.cc (decrease_live_ranges_number): Skip hard register if
targetm.class_likely_spilled_p returns true.
* config/i386/i386.cc (ix86_small_register_classes_for_mode_p):
New.
(TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Use it.
Signed-off-by: H.J. Lu <[email protected]>
---
gcc/config/i386/i386.cc | 15 ++++++++++-----
gcc/ira.cc | 4 ++++
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index bfd9cac215a..a123fe9992f 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -20739,6 +20739,14 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t
rclass,
return NO_REGS;
}
+/* Implement TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P. */
+
+static bool
+ix86_small_register_classes_for_mode_p (machine_mode)
+{
+ return !TARGET_64BIT;
+}
+
/* Implement TARGET_CLASS_LIKELY_SPILLED_P. */
static bool
@@ -27449,12 +27457,9 @@ ix86_libgcc_floating_mode_supported_p
#define TARGET_PREFERRED_RELOAD_CLASS ix86_preferred_reload_class
#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS ix86_preferred_output_reload_class
-/* When this hook returns true for MODE, the compiler allows
- registers explicitly used in the rtl to be used as spill registers
- but prevents the compiler from extending the lifetime of these
- registers. */
#undef TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P
-#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
+#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \
+ ix86_small_register_classes_for_mode_p
#undef TARGET_CLASS_LIKELY_SPILLED_P
#define TARGET_CLASS_LIKELY_SPILLED_P ix86_class_likely_spilled_p
#undef TARGET_CALLEE_SAVE_COST
diff --git a/gcc/ira.cc b/gcc/ira.cc
index 885239d1b43..e93a596e2a9 100644
--- a/gcc/ira.cc
+++ b/gcc/ira.cc
@@ -2158,6 +2158,10 @@ decrease_live_ranges_number (void)
|| (targetm.small_register_classes_for_mode_p (GET_MODE (src))
&& (sregno < FIRST_PSEUDO_REGISTER
|| dregno < FIRST_PSEUDO_REGISTER))
+ || (sregno < FIRST_PSEUDO_REGISTER
+ && targetm.class_likely_spilled_p (REGNO_REG_CLASS (sregno)))
+ || (dregno < FIRST_PSEUDO_REGISTER
+ && targetm.class_likely_spilled_p (REGNO_REG_CLASS (dregno)))
/* We don't see all updates to SP if they are in an
auto-inc memory reference, so we must disallow this
optimization on them. */
--
2.49.0
