From: Pan Li <pan2...@intel.com> This patch would like to introduce the combine of vec_dup + vadd.vv into vadd.vx on the cost value of GR2VR. The late-combine will take place if the cost of GR2VR is zero, or reject the combine if non-zero like 1, 15 in test.
The below test suites are passed for this patch series. * The rv64gcv fully regression test. Pan Li (5): RISC-V: Add new option --param=rvv-gr2vr-cost= for rvv insn RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx on GR2VR cost RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 0 RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 1 RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 15 gcc/config/riscv/autovec-opt.md | 23 + gcc/config/riscv/riscv-opts.h | 2 + gcc/config/riscv/riscv.cc | 46 +- gcc/config/riscv/riscv.opt | 4 + gcc/config/riscv/vector-iterators.md | 4 + .../riscv/rvv/autovec/vx_vf/vx_binary.h | 17 + .../riscv/rvv/autovec/vx_vf/vx_binary_data.h | 401 ++++++++++++++++++ .../riscv/rvv/autovec/vx_vf/vx_binary_run.h | 26 ++ .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c | 8 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i16.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i32.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i64.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i8.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u16.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u32.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u64.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u8.c | 14 + gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 + 41 files changed, 828 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c -- 2.43.0
