Sandra Loosemore <san...@codesourcery.com> writes:
>> +;; Before reload, all multiplier is registered as imul3 (which has a long
>> +;; latency). We temporary jig the latency such that the macc groups
>> +;; are scheduled closely together during the first scheduler pass.
>> +(define_bypass 1 "r74k_int_mul3" "r74k_dsp_mac"
>> + "mips_mult_madd_chain_bypass_p")
>> +(define_bypass 1 "r74k_int_mul3" "r74k_dsp_mac_sat"
>> + "mips_mult_madd_chain_bypass_p")
>
> If this is incorrect or looks like a hack to paper over some other
> problem, I'd be happy to drop the predicate on these bits too. WDYT?
Hmm, yeah, it does look like they should be using mips_linked_madd_p
instead, except that mips_linked_madd_p isn't yet wired up to handle
DSP macs. Rather than pattern-match them all, the easiest thing would
probably be to define a new attribute along the lines of:
(define_attr "accum_in" "none,0,1,2,3,4,5" (const_string "none"))
and use it for the existing imadds too. E.g.:
(define_insn "*mul_acc_si"
[(set (match_operand:SI 0 "register_operand" "=l*?*?,d?")
(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d,d")
(match_operand:SI 2 "register_operand" "d,d"))
(match_operand:SI 3 "register_operand" "0,d")))
(clobber (match_scratch:SI 4 "=X,l"))
(clobber (match_scratch:SI 5 "=X,&d"))]
"GENERATE_MADD_MSUB && !TARGET_MIPS16"
"@
madd\t%1,%2
#"
[(set_attr "type" "imadd")
(set_attr "accum_in" "3")
(set_attr "mode" "SI")
(set_attr "length" "4,8")])
Then mips_linked_madd_p can use get_attr_accum_in to check for chains.
But if that's more work than you want right now, just dropping the
predicates above would be OK too, like you say.
Richard
