Hello,
This patch fixes a minor issue related to the displacement addressing
patterns, which leads to useless movt exts.* sequences and one of the
predicates wrongly accepting non-mem ops.
Tested on rev 190151 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
and no new failures.
OK?
Cheers,
Oleg
ChangeLog:
PR target/50751
* config/sh/sh.md (*extendqisi2_compact_reg,
*extendhisi2_compact_reg): Use arith_reg_operand predicate
instead of register_operand.
* config/sh/predicates.md (movsrc_no_disp_mem_operand): Accept
only mem, simplify.
Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md (revision 190151)
+++ gcc/config/sh/sh.md (working copy)
@@ -4819,14 +4819,14 @@
(define_insn "*extendqisi2_compact_reg"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
- (sign_extend:SI (match_operand:QI 1 "register_operand" "r")))]
+ (sign_extend:SI (match_operand:QI 1 "arith_reg_operand" "r")))]
"TARGET_SH1"
"exts.b %1,%0"
[(set_attr "type" "arith")])
(define_insn "*extendhisi2_compact_reg"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
- (sign_extend:SI (match_operand:HI 1 "register_operand" "r")))]
+ (sign_extend:SI (match_operand:HI 1 "arith_reg_operand" "r")))]
"TARGET_SH1"
"exts.w %1,%0"
[(set_attr "type" "arith")])
Index: gcc/config/sh/predicates.md
===================================================================
--- gcc/config/sh/predicates.md (revision 190151)
+++ gcc/config/sh/predicates.md (working copy)
@@ -428,28 +428,12 @@
return general_operand (op, mode);
})
-;; Same as movsrc_operand, but rejects displacement addressing.
+;; Returns 1 if OP is a MEM that does not use displacement addressing.
(define_predicate "movsrc_no_disp_mem_operand"
- (match_code "subreg,reg,const_int,const_double,mem,symbol_ref,label_ref,const,const_vector")
+ (match_code "mem")
{
- if (!general_movsrc_operand (op, mode))
- return 0;
-
- if ((mode == QImode || mode == HImode)
- && mode == GET_MODE (op)
- && (MEM_P (op)
- || (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))))
- {
- rtx x = XEXP ((MEM_P (op) ? op : SUBREG_REG (op)), 0);
-
- if (GET_CODE (x) == PLUS
- && REG_P (XEXP (x, 0))
- && CONST_INT_P (XEXP (x, 1)))
- return 0;
- }
-
- return 1;
+ return general_movsrc_operand (op, mode) && satisfies_constraint_Snd (op);
})
;; Returns 1 if OP can be a destination of a move. Same as
