On 6/5/25 6:25 AM, Jiawei wrote:
Thanks for your suggestions, I found that the ior is successful
generated in combine pass without using the zbs extension, and in other
architecture it also work fine.
Yea, it's probably an artifact of how we need to represent the single
bit clear. It's represented as an AND of a ROTATE.
So we need simplify-rtx to handle this:
(set (reg:DI 154)
(xor:DI (and:DI (rotate:DI (const_int -2 [0xfffffffffffffffe])
(subreg:QI (reg:DI 156 [ b ]) 0))
(reg:DI 149 [ *a_10(D) ]))
(ashift:DI (const_int 1 [0x1])
(subreg:QI (reg:DI 156 [ b ]) 0))))
Note how the and-rotate and the ashift of (const_int 1) both use the
same rotate/shift count (reg:DI 156). That's the key. The and-rotate
clears a bit and thus the xor must be setting the bit and that whole
mess can simplify to ior based bit insertion.
jeff
