On Mon, Jun 16, 2025 at 4:14 PM Hongtao Liu <crazy...@gmail.com> wrote:
>
> >+enum redundant_load_kind
> >+{
> >+ LOAD_CONST0_VECTOR,
> >+ LOAD_CONSTM1_VECTOR,
> >+ LOAD_VECTOR
> >+};
> Perhaps rename to x86_cse_kind, X86_CSE_CONST0_VECTOR,
> X86_CSE_CONSTM1_VECTOR, X86_CSE_VEC_DUP?
Fixed.
> LOAD sounds a bit ambiguous.
> Similar to ix86_get_vector_load_mode -> ix86_get_vector_cse_mode?
Fixed.
> >+ if (SUBREG_P (op))
> >+ reg = SUBREG_REG (op);
> Need to make sure subreg is a lowpart of op, it can't be a paradoxical subreg.
Changed to
if (SUBREG_P (op) && !paradoxical_subreg_p (op))
reg = SUBREG_REG (op);
> >+ /* Only single def chain is supported. */
> >+ df_ref ref = DF_REG_DEF_CHAIN (REGNO (reg));
> >+ if (!ref || DF_REF_NEXT_REG (ref) != nullptr)
> >+ return nullptr;
>
> Could we just reuse df_find_single_def_src and add extra code to get
> the insn and handle *insn_p = ***.
> Also I notice df_find_single_def_src exclude DF_REF_IS_ARTIFICIAL
> which is not in your original patch, after excluding it, do below
> codes still be needed?
>
>
> >+ ix86_place_single_vector_set (load->broadcast_reg,
> >+ load->broadcast_source,
> >+ load->bbs,
> >+ (load->kind >= LOAD_VECTOR
> Just load->kind == LOAD_VECTOR?
Fixed.
--
H.J.
