> +++ b/gcc/config/riscv/andes.md
> @@ -0,0 +1,430 @@
> +;; Machine description for Andes vendor extensions
> +;; Copyright (C) 2021-2025 Free Software Foundation, Inc.
2025 rather than 2021-2025
>+(define_constraint "ads_Bz07"
Could you rename it to Ou07?
>+ "Zero extended immediate 7-bit value"
>+ (and (match_test "TARGET_XANDESPERF")
And don't constraint that with TARGET_XANDESPERF
>+ (and (match_code "const_int")
>+ (match_test "ival < (1 << 7) && ival >= 0"))))
> +;; Iterator for integer modes smaller than 32bit.
smaller than or equal to 32bit?
> +(define_mode_iterator ANY32 [QI HI SI])
ANYLE32?
> +;; Branch-on-bit for AndesPerf.
> +(define_predicate "branch_bbcs_operand"
Add ads_ prefix
> + (match_code "const_int")
> +{
> + if (TARGET_XANDESPERF && (INTVAL (op) >= 0))
> + {
> + if (TARGET_64BIT && INTVAL (op) <= 63)
> + return true;
> + else if (INTVAL (op) <=31)
> + return true;
> + else
> + return false;
> + }
> +
> + return false;
> +})
> +;; Branch on small immediate range.
> +(define_predicate "branch_bimm_operand"
Add ads_ prefix
> + (match_code "const_int")
> +{
> + if (TARGET_XANDESPERF)
> + return satisfies_constraint_ads__Bz07 (op);
> + else
> + return false;
> +})
> +(define_predicate "imm_extract_operand"
Add ads_ prefix
> + (match_test "satisfies_constraint_ads__Bext (op)"))
> +
> +(define_predicate "extract_size_imm_si"
Add ads_ prefix
> + (and (match_code "const_int")
> + (match_test "IN_RANGE (INTVAL (op), 1, 32)")))
> +
> +(define_predicate "extract_loc_imm_si"
Rename it to unsigned_5_bit_integer_operand
> + (and (match_code "const_int")
> + (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
> +
> +(define_predicate "extract_size_imm_di"
Add ads_ prefix
> + (and (match_code "const_int")
> + (match_test "IN_RANGE (INTVAL (op), 1, 64)")))
> +
> +(define_predicate "extract_loc_imm_di"
Rename it to unsigned_6_bit_integer_operand
> + (and (match_code "const_int")
> + (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
> @@ -4196,6 +4200,12 @@ riscv_rtx_costs (rtx x, machine_mode mode, int
> outer_code, int opno ATTRIBUTE_UN
> return false;
>
> case AND:
> + /* Andes bfo patterns. */
> + if (TARGET_XANDESPERF && GET_CODE (XEXP (x, 0)) == ASHIFT)
You just put one more space after &&
> + {
> + *total = COSTS_N_INSNS (1);
> + return true;
> + }
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 3406b50518ed..a22cca63a2d2 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -1891,13 +1891,15 @@
> (zero_extend:DI
> (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
> "TARGET_64BIT && !TARGET_ZBA && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX
> + && !TARGET_XANDESPERF
> && !(REG_P (operands[1]) && VL_REG_P (REGNO (operands[1])))"
> "@
> #
> lwu\t%0,%1"
> "&& reload_completed
> && REG_P (operands[1])
> - && !paradoxical_subreg_p (operands[0])"
> + && !paradoxical_subreg_p (operands[0])
> + && !TARGET_XANDESPERF"
We don't need to check TARGET_XANDESPERF here.
> [(set (match_dup 0)
> (ashift:DI (match_dup 1) (const_int 32)))
> (set (match_dup 0)
> @@ -1917,13 +1919,15 @@
> [(set (match_operand:GPR 0 "register_operand" "=r,r")
> (zero_extend:GPR
> (match_operand:HI 1 "nonimmediate_operand" " r,m")))]
> - "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX"
> + "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX
> + && !TARGET_XANDESPERF"
> "@
> #
> lhu\t%0,%1"
> "&& reload_completed
> && REG_P (operands[1])
> - && !paradoxical_subreg_p (operands[0])"
> + && !paradoxical_subreg_p (operands[0])
> + && !TARGET_XANDESPERF"
We don't need to check TARGET_XANDESPERF here.
> [(set (match_dup 0)
> (ashift:GPR (match_dup 1) (match_dup 2)))
> (set (match_dup 0)
> @@ -1979,7 +1983,7 @@
> [(set (match_operand:DI 0 "register_operand" "=r,r")
> (sign_extend:DI
> (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
> - "TARGET_64BIT && !TARGET_XTHEADMEMIDX"
> + "TARGET_64BIT && !TARGET_XTHEADMEMIDX && !TARGET_XANDESPERF"
> "@
> sext.w\t%0,%1
> lw\t%0,%1"
> @@ -1996,12 +2000,14 @@
> [(set (match_operand:SUPERQI 0 "register_operand" "=r,r")
> (sign_extend:SUPERQI
> (match_operand:SHORT 1 "nonimmediate_operand" " r,m")))]
> - "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX"
> + "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX
> + && !TARGET_XANDESPERF"
> "@
> #
> l<SHORT:size>\t%0,%1"
> "&& reload_completed
> && REG_P (operands[1])
> + && !TARGET_XANDESPERF
We don't need to check TARGET_XANDESPERF here.
> && !paradoxical_subreg_p (operands[0])"
> [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))
> (set (match_dup 0) (ashiftrt:SI (match_dup 0) (match_dup 2)))]
> @@ -3076,11 +3082,13 @@
> || TARGET_XVENTANACONDOPS || TARGET_SFB_ALU)
> && (INTVAL (operands[2]) == 1))
> && !TARGET_XTHEADBB
> + && !TARGET_XANDESPERF
> && !(TARGET_64BIT
> && (INTVAL (operands[3]) > 0)
> && (INTVAL (operands[2]) + INTVAL (operands[3]) == 32))"
> "#"
> - "&& reload_completed"
> + "&& reload_completed
> + && !TARGET_XANDESPERF"
We don't need to check TARGET_XANDESPERF here.
> [(set (match_dup 4)
> (ashift:GPR (match_dup 1) (match_dup 2)))
> (set (match_dup 0)
> @@ -3461,9 +3469,9 @@
> (label_ref (match_operand 1))
> (pc)))
> (clobber (match_scratch:X 4 "=&r"))]
> - ""
> - "#"
> - "reload_completed"
> + "!TARGET_XANDESPERF"
> + "#"
> + "reload_completed && !TARGET_XANDESPERF"
We don't need to check TARGET_XANDESPERF here.
> [(set (match_dup 4)
> (ashift:X (match_dup 2) (match_dup 3)))
> (set (pc)
On Mon, Jun 23, 2025 at 5:09 PM KuanLin Chen <best124...@gmail.com> wrote:
>
> Hi,
>
> This patch adds support for the XAndesperf ISA extension.
> The 32-bit AndeStar V5 extension includes branch instructions,
> load effective address instructions, and string processing
> instructions for performance improvement.
> New INSN patterns are added into the new file andes.md
> as a seprated vender extension.
>
> gcc/ChangeLog:
>
> * config/riscv/constraints.md (ads_Bz07): New constraint.
> (ads_Bext): New constraint.
> * config/riscv/iterators.md (ANY32): New iterator.
> (sizen): New iterator.
> (sh_limit): New iterator.
> * config/riscv/predicates.md (branch_bbcs_operand): New predicate.
> (branch_bimm_operand): New predicate.
> (imm_extract_operand): New predicate.
> (extract_size_imm_si): New predicate.
> (extract_loc_imm_si): New predicate.
> (extract_size_imm_di): New predicate.
> (extract_loc_imm_di): New predicate.
> * config/riscv/riscv-builtins.cc:
> Add new AVAIL andesperf32 and andesperf64.
> Add new define RISCV_ATYPE_ULONG and RISCV_ATYPE_LONG.
> * config/riscv/riscv-ftypes.def: New DEF_RISCV_FTYPE.
> * config/riscv/riscv.cc
> (riscv_extend_cost): Cost for pattern 'bfo'.
> (riscv_rtx_costs): Cost for XAndesperf extension.
> * config/riscv/riscv.md: Add support for XAndesperf to patterns
> zero_extendsidi2_internal, zero_extendhi2, extendsidi2_internal,
> extend<SHORT:mode><SUPERQI:mode>2, <any_extract:optab><GPR:mode>3
> and branch_on_bit.
> * config/riscv/vector-iterators.md
> (sz): Add sign_extract and zero_extract.
> * config/riscv/andes.def: New file for vender Andes.
> * config/riscv/andes.md: New file for vender Andes.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/xandesperf-1.c: New test.
> * gcc.target/riscv/xandesperf-10.c: New test.
> * gcc.target/riscv/xandesperf-2.c: New test.
> * gcc.target/riscv/xandesperf-3.c: New test.
> * gcc.target/riscv/xandesperf-4.c: New test.
> * gcc.target/riscv/xandesperf-5.c: New test.
> * gcc.target/riscv/xandesperf-6.c: New test.
> * gcc.target/riscv/xandesperf-7.c: New test.
> * gcc.target/riscv/xandesperf-8.c: New test.
> * gcc.target/riscv/xandesperf-9.c: New test.
> ---
