Karl Meakin <karl.mea...@arm.com> writes: > Give the `define_insn` rules used in lowering `cbranch<mode>4` to RTL > more descriptive and consistent names: from now on, each rule is named > after the AArch64 instruction that it generates. Also add comments to > document each rule. > > gcc/ChangeLog: > > * config/aarch64/aarch64.md (condjump): Rename to ... > (aarch64_bcond): ...here. > (*compare_condjump<GPI:mode>): Rename to ... > (*aarch64_bcond_wide_imm<GPI:mode>): ...here. > (aarch64_cb<optab><mode>): Rename to ... > (aarch64_cbz<optab><mode>1): ...here. > (*cb<optab><mode>1): Rename to ... > (*aarch64_tbz<optab><mode>1): ...here. > (@aarch64_tb<optab><ALLI:mode><GPI:mode>): Rename to ... > (@aarch64_tbz<optab><ALLI:mode><GPI:mode>): ...here. > (restore_stack_nonlocal): Handle rename. > (stack_protect_combined_test): Likewise. > * config/aarch64/aarch64-simd.md (cbranch<mode>4): Likewise. > * config/aarch64/aarch64-sme.md (aarch64_restore_za): Likewise. > * config/aarch64/aarch64.cc (aarch64_gen_test_and_branch): Likewise. > --- > gcc/config/aarch64/aarch64-simd.md | 2 +- > gcc/config/aarch64/aarch64-sme.md | 2 +- > gcc/config/aarch64/aarch64.cc | 4 ++-- > gcc/config/aarch64/aarch64.md | 21 ++++++++++++--------- > 4 files changed, 16 insertions(+), 13 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64-simd.md > b/gcc/config/aarch64/aarch64-simd.md > index e771defc73f..33839f2fec7 100644 > --- a/gcc/config/aarch64/aarch64-simd.md > +++ b/gcc/config/aarch64/aarch64-simd.md > @@ -2884,9 +2884,9 @@ aarch64_gen_test_and_branch (rtx_code code, rtx x, int > bitnum, > emit_insn (gen_aarch64_and3nr_compare0 (mode, x, mask)); > rtx cc_reg = gen_rtx_REG (CC_NZVmode, CC_REGNUM); > rtx x = gen_rtx_fmt_ee (code, CC_NZVmode, cc_reg, const0_rtx); > - return gen_condjump (x, cc_reg, label); > + return gen_aarch64_bcond (x, cc_reg, label); > } > - return gen_aarch64_tb (code, mode, mode, > + return gen_aarch64_tbz (code, mode, mode, > x, gen_int_mode (bitnum, mode), label);
Sorry for the formatting nit, but: please indent this line by an extra column too, so that the arguments still line up. > [...] > @@ -8104,7 +8107,7 @@ (define_expand "stack_protect_combined_test" > : gen_stack_protect_test_si) (operands[0], operands[1])); > > rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM); > - emit_jump_insn (gen_condjump (gen_rtx_EQ (VOIDmode, cc_reg, const0_rtx), > + emit_jump_insn (gen_aarch64_bcond (gen_rtx_EQ (VOIDmode, cc_reg, > const0_rtx), > cc_reg, operands[2])); Similarly, please reindent this to match the new name. OK with those changes, thanks. Richard
