> Pan -- can you cover reviewing the testsuite bits since thisis an area
> where you've done a ton of work over the last year or so.
Sure thing and thanks Jeff, I will take a look after return back from a
vacation, ETA before the end of this week.
Pan
-----Original Message-----
From: Jeff Law <jeffreya...@gmail.com>
Sent: Wednesday, June 25, 2025 5:30 AM
To: Ciyan Pan <panci...@eswincomputing.com>; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; richard.guent...@gmail.com; tamar.christ...@arm.com;
juzhe.zh...@rivai.ai; Li, Pan2 <pan2...@intel.com>; rdapp....@gmail.com
Subject: Re: [PATCH 2/2] RISC-V: Add testcases for signed scalar SAT_ADD IMM
form 2
On 6/23/25 9:12 PM, Ciyan Pan wrote:
> From: panciyan <panci...@eswincomputing.com>
>
> This patch adds testcase for form2, as shown below:
>
> T __attribute__((noinline)) \
> sat_s_add_imm_##T##_fmt_2##_##INDEX (T x) \
> { \
> T sum = (T)((UT)x + (UT)IMM); \
> return ((x ^ sum) < 0 && (x ^ IMM) >= 0) ? \
> (-(T)(x < 0) ^ MAX) : sum; \
> }
>
> Passed the rv64gcv regression test.
>
> Signed-off-by: Ciyan Pan <panci...@eswincomputing.com>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/sat/sat_arith.h:
> * gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c: New test.
> * gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c: New test.
Pan -- can you cover reviewing the testsuite bits since thisis an area
where you've done a ton of work over the last year or so.
THanks!
jeff
