On Sat, Jun 21, 2025 at 09:06:42AM -0600, Jeff Law wrote:
>
>
> On 5/20/25 1:22 AM, Stefan Schulze Frielinghaus wrote:
> > Implement hard register constraints of the form {regname} where regname
> > must be a valid register name for the target. Such constraints may be
> > used in asm statements as a replacement for register asm and in machine
> > descriptions.
> >
> > It is expected and desired that optimizations coalesce multiple pseudos
> > into one whenever possible. However, in case of hard register
> > constraints we may have to undo this and introduce copies since
> > otherwise we could constraint a single pseudo to different hard
> > registers. Therefore, we have to introduce copies of such a pseudo and
> > use these for conflicting inputs. This is done prior RA during asmcons
> > in match_asm_constraints_2(). While IRA tries to reduce live ranges, it
> > also replaces some register-register moves. That in turn might undo
> > those copies of a pseudo which we just introduced during asmcons. Thus,
> > check in decrease_live_ranges_number() via
> > valid_replacement_for_asm_input_p() whether it is valid to perform a
> > replacement.
> >
> > The reminder of the patch mostly deals with parsing and decoding hard
> > register constraints. The actual work is done by LRA in
> > process_alt_operands() where a register filter, according to the
> > constraint, is installed.
> >
> > For the sake of "reviewability" and in order to show the beauty of LRA,
> > error handling (which gets pretty involved) is spread out into a
> > subsequent patch.
> >
> > Limitation
> > ----------
> >
> > Currently, a fixed register cannot be used as hard register constraint.
> > For example, loading the stack pointer on x86_64 via
> >
> > void *
> > foo (void)
> > {
> > void *y;
> > __asm__ ("" : "={rsp}" (y));
> > return y;
> > }
> >
> > leads to an error. This is unfortunate since register asm does not have
> > this limitation. The culprit seems to be that during reload
> > ira_class_hard_regs_num[rclass] does not even include fixed registers
> > which is why lra_assign() ultimately fails. Does anyone have an idea
> > how to lift this limitation? Maybe there is even a shortcut in order to
> > force a pseudo into a hard reg?
> >
> > Asm Adjust Hook
> > ---------------
> >
> > The following targets implement TARGET_MD_ASM_ADJUST:
> >
> > - aarch64
> > - arm
> > - avr
> > - cris
> > - i386
> > - mn10300
> > - nds32
> > - pdp11
> > - rs6000
> > - s390
> > - vax
> >
> > Most of them only add the CC register to the list of clobbered register.
> > However, cris, i386, and s390 need some minor adjustment.
> > ---
> > gcc/config/cris/cris.cc | 6 +-
> > gcc/config/i386/i386.cc | 6 +
> > gcc/config/s390/s390.cc | 6 +-
> > gcc/doc/extend.texi | 178 ++++++++++++++++++
> > gcc/doc/md.texi | 6 +
> > gcc/function.cc | 116 ++++++++++++
> > gcc/genoutput.cc | 14 ++
> > gcc/genpreds.cc | 4 +-
> > gcc/ira.cc | 79 +++++++-
> > gcc/lra-constraints.cc | 13 ++
> > gcc/recog.cc | 11 +-
> > gcc/stmt.cc | 39 ++++
> > gcc/stmt.h | 1 +
> > gcc/testsuite/gcc.dg/asm-hard-reg-1.c | 85 +++++++++
> > gcc/testsuite/gcc.dg/asm-hard-reg-2.c | 33 ++++
> > gcc/testsuite/gcc.dg/asm-hard-reg-3.c | 25 +++
> > gcc/testsuite/gcc.dg/asm-hard-reg-4.c | 50 +++++
> > gcc/testsuite/gcc.dg/asm-hard-reg-5.c | 36 ++++
> > gcc/testsuite/gcc.dg/asm-hard-reg-6.c | 60 ++++++
> > gcc/testsuite/gcc.dg/asm-hard-reg-7.c | 41 ++++
> > gcc/testsuite/gcc.dg/asm-hard-reg-8.c | 49 +++++
> > .../gcc.target/aarch64/asm-hard-reg-1.c | 55 ++++++
> > .../gcc.target/i386/asm-hard-reg-1.c | 115 +++++++++++
> > .../gcc.target/s390/asm-hard-reg-1.c | 103 ++++++++++
> > .../gcc.target/s390/asm-hard-reg-2.c | 43 +++++
> > .../gcc.target/s390/asm-hard-reg-3.c | 42 +++++
> > .../gcc.target/s390/asm-hard-reg-4.c | 6 +
> > .../gcc.target/s390/asm-hard-reg-5.c | 6 +
> > .../gcc.target/s390/asm-hard-reg-6.c | 152 +++++++++++++++
> > .../gcc.target/s390/asm-hard-reg-longdouble.h | 18 ++
> > 30 files changed, 1391 insertions(+), 7 deletions(-)
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-1.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-2.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-3.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-4.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-5.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-6.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-7.c
> > create mode 100644 gcc/testsuite/gcc.dg/asm-hard-reg-8.c
> > create mode 100644 gcc/testsuite/gcc.target/aarch64/asm-hard-reg-1.c
> > create mode 100644 gcc/testsuite/gcc.target/i386/asm-hard-reg-1.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-1.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-2.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-3.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-4.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-5.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-6.c
> > create mode 100644 gcc/testsuite/gcc.target/s390/asm-hard-reg-longdouble.h
> So you need a ChangeLog, but this is OK once the ChangeLog is cobbled
> together. I think you should wait to commit until all 4 patches in this
> series are ACK'd though.
Thanks for reviewing/commenting all four patches. Very much appreciated!
Do I need approval of target maintainers, too? Maybe for
cris_md_asm_adjust() from cris.cc and map_egpr_constraints() from
i386.cc and maybe the new target tests?
I will wrap-up the patch series and include a changelog and CC every
required maintainer/approver.
Cheers,
Stefan
