MMX allows only direct moves from zero, so correct V_32:mode and v2qi
move patterns to allow only nonimm_or_0_operand as their input operand.
gcc/ChangeLog:
* config/i386/mmx.md (mov<V_32:mode>):
Use nonimm_or_0_operand predicate for operand 1.
(*mov<V_32:mode>_internal): Ditto.
(movv2qi): Ditto.
(*movv2qi_internal): Ditto. Use ix86_hardreg_mov_ok
in insn condition.
Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}.
Uros.
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 79202323e53..29a8cb599a7 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -329,7 +329,7 @@ (define_expand "movmisalign<mode>"
(define_expand "mov<mode>"
[(set (match_operand:V_32 0 "nonimmediate_operand")
- (match_operand:V_32 1 "nonimmediate_operand"))]
+ (match_operand:V_32 1 "nonimm_or_0_operand"))]
""
{
ix86_expand_vector_move (<MODE>mode, operands);
@@ -339,7 +339,7 @@ (define_expand "mov<mode>"
(define_insn "*mov<mode>_internal"
[(set (match_operand:V_32 0 "nonimmediate_operand"
"=r ,m ,v,v,v,m,r,v")
- (match_operand:V_32 1 "general_operand"
+ (match_operand:V_32 1 "nonimm_or_0_operand"
"rmC,rC,C,v,m,v,v,r"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& ix86_hardreg_mov_ok (operands[0], operands[1])"
@@ -457,7 +457,7 @@ (define_expand "movmisalign<mode>"
(define_expand "movv2qi"
[(set (match_operand:V2QI 0 "nonimmediate_operand")
- (match_operand:V2QI 1 "nonimmediate_operand"))]
+ (match_operand:V2QI 1 "nonimm_or_0_operand"))]
""
{
ix86_expand_vector_move (V2QImode, operands);
@@ -467,9 +467,10 @@ (define_expand "movv2qi"
(define_insn "*movv2qi_internal"
[(set (match_operand:V2QI 0 "nonimmediate_operand"
"=r,r,r,m ,v,v,v,jm,m,r,v")
- (match_operand:V2QI 1 "general_operand"
+ (match_operand:V2QI 1 "nonimm_or_0_operand"
"r ,C,m,rC,C,v,m,x,v,v,r"))]
- "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ "!(MEM_P (operands[0]) && MEM_P (operands[1]))
+ && ix86_hardreg_mov_ok (operands[0], operands[1])"
{
switch (get_attr_type (insn))
{
