[PATCH 2/2] x86: testsuite: Fix asm-hard-reg-*.c [PR121205]

[Stefan Schulze Frielinghaus]

Also consider target x86_64 -m32.

gcc/testsuite/ChangeLog:

        PR target/121205
        * gcc.dg/asm-hard-reg-1.c: Also consider target x86_64 -m32.
        * gcc.dg/asm-hard-reg-2.c: Ditto.
        * gcc.dg/asm-hard-reg-4.c: Ditto.
        * gcc.dg/asm-hard-reg-5.c: Ditto.
        * gcc.dg/asm-hard-reg-6.c: Ditto.
        * gcc.target/i386/asm-hard-reg-2.c: Ditto.
---
 Tested on x86_64 with RUNTESTFLAGS containing
 --target_board='unix{,-m32}'.  Ok for mainline?

 gcc/testsuite/gcc.dg/asm-hard-reg-1.c          | 5 +++--
 gcc/testsuite/gcc.dg/asm-hard-reg-2.c          | 2 +-
 gcc/testsuite/gcc.dg/asm-hard-reg-4.c          | 2 +-
 gcc/testsuite/gcc.dg/asm-hard-reg-5.c          | 2 +-
 gcc/testsuite/gcc.dg/asm-hard-reg-6.c          | 6 ++++--
 gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c | 2 +-
 6 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-1.c 
b/gcc/testsuite/gcc.dg/asm-hard-reg-1.c
index 6a5a9ada45f..7034b108ce6 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-1.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-1.c
@@ -24,8 +24,9 @@
 # define GPR "{rcx}"
 /* { dg-final { scan-assembler-times "foo\t%cl" 2 { target { x86_64-*-* } } } 
} */
 /* { dg-final { scan-assembler-times "foo\t%cx" 2 { target { x86_64-*-* } } } 
} */
-/* { dg-final { scan-assembler-times "foo\t%ecx" 2 { target { x86_64-*-* } } } 
} */
-/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { x86_64-*-* } } } 
} */
+/* { dg-final { scan-assembler-times "foo\t%ecx" 4 { target { x86_64-*-* && { 
! lp64 } } } } } */
+/* { dg-final { scan-assembler-times "foo\t%ecx" 2 { target { x86_64-*-* && 
lp64 } } } } */
+/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { x86_64-*-* && 
lp64 } } } } */
 #endif
 
 char
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-2.c 
b/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
index 7dabf9657cb..37ca920f502 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* 
x86_64-*-* } } */
+/* { dg-do compile { target { aarch64*-*-* powerpc64*-*-* riscv64-*-* 
s390*-*-* } || { x86_64-*-* && lp64 } } } */
 /* { dg-options "-std=c99" } we need long long */
 
 #if defined (__aarch64__)
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c 
b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
index 0134bf0054c..be8cb7762bc 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target aarch64*-*-* arm*-*-* powerpc*-*-* riscv*-*-* 
s390*-*-* x86_64-*-* } } */
+/* { dg-do compile { target { aarch64*-*-* arm*-*-* powerpc*-*-* riscv*-*-* 
s390*-*-* } || { x86_64-*-* && lp64 } } } */
 
 #if defined (__aarch64__)
 # define FPR "{d5}"
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-5.c 
b/gcc/testsuite/gcc.dg/asm-hard-reg-5.c
index a9e25ce1746..9c88d62a03b 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-5.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* 
x86_64-*-* } } */
+/* { dg-do compile { target { aarch64*-*-* powerpc64*-*-* riscv64-*-* 
s390*-*-* } || { x86_64-*-* && lp64 } } } */
 
 typedef int V __attribute__ ((vector_size (4 * sizeof (int))));
 
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-6.c 
b/gcc/testsuite/gcc.dg/asm-hard-reg-6.c
index d9b7fae8097..4eb7fd6a301 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-6.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-6.c
@@ -43,8 +43,10 @@
 # define GPR1 "{eax}"
 # define GPR2 "{ebx}"
 # define GPR3 "{rcx}"
-/* { dg-final { scan-assembler-times "foo\t%eax,%rcx" 1 { target { x86_64-*-* 
} } } } */
-/* { dg-final { scan-assembler-times "bar\t%ebx,\\(%rsi\\)" 1 { target { 
x86_64-*-* } } } } */
+/* { dg-final { scan-assembler-times "foo\t4\\(%esp\\),%ecx" 1 { target { 
x86_64-*-* && { ! lp64 } } } } } */
+/* { dg-final { scan-assembler-times "foo\t%eax,%rcx" 1 { target { x86_64-*-* 
&& lp64 } } } } */
+/* { dg-final { scan-assembler-times "bar\t%ebx,\\(%eax\\)" 1 { target { 
x86_64-*-* && { ! lp64 } } } } } */
+/* { dg-final { scan-assembler-times "bar\t%ebx,\\(%rsi\\)" 1 { target { 
x86_64-*-* && lp64 } } } } */
 #endif
 
 void
diff --git a/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c 
b/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c
index b35cf53c5cc..756f6f8c412 100644
--- a/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c
+++ b/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c
@@ -8,7 +8,7 @@ test (void)
 #ifdef __x86_64__
   int z __attribute__ ((mode (TI)));
 #else
-  long z;
+  long long z;
 #endif
 
   __asm__ __volatile__ ("" : "=A" (z), "={rbx}" (y));
-- 
2.49.0